Video display systems require large amounts of high-bandwidth memory to implement multi- window display-processing functions for full-motion video images (e.g. multi-source gen-lock, variable scaling, scan conversion, etc.) and high resolution animated graphics (e.g. (alpha) - channeling, block moving, multi-windowing, etc.). In this paper, low-cost memory architectures are presented that efficiently share memory among the different video and graphics functions in a multi-window full-motion video and graphics display system. The major problem associated with shared (display) memory systems: I/O bottleneck, is eliminated by using a segmented memory, I/O buffers and a communication network that routes concurrent streams of video and graphics data between I/O devices, buffers and memory segments. Further reduction of memory is obtained by encoding the window overlay priorities with 2D run lengths instead of overlay codes for every pixel on the screen. This approach also reduces the real-time performance requirements for the controllers of the architecture. Finally, the paper describes an algorithm that schedules the video/graphics access to the segments of the display memory such that bus contention is minimized. The resulting `free time' can be used by a graphics processor to perform fast updates in the display memory.