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21 December 1994Design of a high-quality real-time processor for airborne SAR data
This paper outlines the principles behind the software architecture design for a real-time processor for airborne SAR data. This processor is implemented on an MIMD parallel computer (the Meiko CS1) using a point-to-point message passing system. The processing algorithms are the result of research by the DRA, Malvern, and are capable of yielding focused, undistorted SAR imagery. Processing functions considered include: initial motion compensation (based on accelerometer data), autofucus with phase correction, and azimuth focusing. Real time processing rates of about 10 MBytes/s are now routinely achieved. We indicate the compromises between processor power, available local memory and communications bandwidth needed to achieve real-time operation. A recent development of the SAR processor has been the addition of a generic post-processing module to allow image interpretation algorithms to operate on the imagery as it is produced. Real-time SAR segmentation has been demonstrated using this facility; ports of other algorithms are planned.
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Gordon C. Pryde, K. D. R. Beckett, L. M. Delves, Christopher John Oliver, Richard Geoffrey White, "Design of a high-quality real-time processor for airborne SAR data," Proc. SPIE 2316, SAR Data Processing for Remote Sensing, (21 December 1994); https://doi.org/10.1117/12.197545