14 September 1994 Cost and yield estimation in a virtual IC factory
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A methodology to include cost and yield estimation in a comprehensive TCAD model of semiconductor processing is presented. The underlying idea is that a process recipe used to drive TCAD simulators contains a complete set of information about the process. If it is combined with empirical equipment data, a set of models can be constructed to describe cost as a function of the process recipe and equipment data. This paper presents a user-configurable cost modeling tool tightly integrated with TCAD simulators, enabling the user to study related and important questions of cost and yield not covered by traditional TCAD tools.
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Valery Axelrad, Valery Axelrad, Yuri Granik, Yuri Granik, Victor V. Boksha, Victor V. Boksha, J. G. Rollins, J. G. Rollins, } "Cost and yield estimation in a virtual IC factory", Proc. SPIE 2334, Microelectronics Manufacturability, Yield, and Reliability, (14 September 1994); doi: 10.1117/12.186767; https://doi.org/10.1117/12.186767

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