Compact receivers and smart-pixel chips for optical interconnects and signal processing

Wai-Chi Fang; Bing J. Sheu; Sa H. Bang

doi:10.1117/12.206322

5 April 1995 Compact receivers and smart-pixel chips for optical interconnects and signal processing

Wai-Chi Fang; Bing J. Sheu; Sa H. Bang

Author Affiliations +

Proceedings Volume 2400, Optoelectronic Interconnects III; (1995) https://doi.org/10.1117/12.206322
Event: Photonics West '95, 1995, San Jose, CA, United States

Abstract

A continuous-time shift-invariant cellular neural network (CNN) with hardware annealing capability, digitally programmable synaptic weights, and optical inputs/outputs has been developed. This electro-optical neurocomputing processor has great potential in solving many important scientific problems in signal processing and optimization. Advanced packaging for the proposed optoelectronic neurocomputing system is a thin-film silicon-substrate multichip module with flip-chip connection technologies. This paper presents two functional chips designed for the proposed electro-optical neurocomputing processor: a monolithic GaAs 2-D array of optical receivers, and a VLSI CMOS 2-D array of smart pixels based on the annealed CNN. Due to the multichip module integration of these chips in the same silicon substrate, a complete optoelectronics neurocomputing system can be realized in a very compact hardware.

Citation Download Citation

Wai-Chi Fang, Wai-Chi Fang, Bing J. Sheu, Bing J. Sheu, Sa H. Bang, Sa H. Bang, } "Compact receivers and smart-pixel chips for optical interconnects and signal processing", Proc. SPIE 2400, Optoelectronic Interconnects III, (5 April 1995); doi: 10.1117/12.206322; https://doi.org/10.1117/12.206322

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