10 April 1995 256 x 256 CMOS active pixel image sensor
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A 256 X 256 CMOS photo-gate active pixel image sensor is presented. The image sensor uses four MOS transistors within each pixel to buffer the photo-signal, enhance sensitivity, and suppress noise. The pixel size is 20 micrometers X 20 micrometers and was implemented in a standard digital 0.9 micrometers single-polysilicon, double-metal, n-well CMOS process; leading to 25% fill-factor. Row and column decoders and counters are monolithically integrated as well as per column analog signal correlated double-sampling (CDS) processors, yielding a total chip size of approximately 4.5 mm X 5.0 mm. The image sensor features random accessibility and can be employed for electronic panning applications. It is powered from a single 5.0 V source. At 5.0 V power supply, the video signal saturation level is approximately 1,200 mV with rms read-out noise level of approximately 300 (mu) V, yielding a dynamic range of 72 dB (12 bits). The read-out sensitivity is approximately 6.75 (mu) V per electron, indicating a read-out node capacitance of approximately 24 fF which is consistent with the extracted value. The measured dark current (at room temperature) is approximately 160 mV/s, equivalent to 3.3 nA/cm2. The raw fixed pattern noise (exhibited as column-wise streaks) is approximately 20 mV (peak-to-peak) or approximately 1.67% of saturation level. At 15 frames per second, the power dissipation is approximately 75 mW.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sayed I. Eid, Sayed I. Eid, Alex G. Dickinson, Alex G. Dickinson, Dave A. Inglis, Dave A. Inglis, Bryan D. Ackland, Bryan D. Ackland, Eric R. Fossum, Eric R. Fossum, } "256 x 256 CMOS active pixel image sensor", Proc. SPIE 2415, Charge-Coupled Devices and Solid State Optical Sensors V, (10 April 1995); doi: 10.1117/12.206522; https://doi.org/10.1117/12.206522


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