A 1D camera was developed to provide a small high-dynamic-range, high- resolution imager for use in a variety of optical processors. The camera is built around a high-performance 16-port 1024-pixel by 1-line charge- coupled device (CCD) array. The array and associated drive circuitry are integrated into a compact camera head. The camera contains a three-board set consisting of the array and its output buffers, a clock driver board, and a timing control board. Because of the parallel output structure, the readout time can be less than 10microsecond(s) , giving a maximum data output rate of over 100 million pixels per second. The camera has a dynamic range of over 55 dB of optical intensity. The camera electronically buffers the CCD outputs to drive 75-ohm coaxial cables to an external array of analog multiplexers and an analog to digital converter (ADC). At the highest transfer rate of over 100,000 lines per second, 16 ADCs could be used to read all the channels simultaneously. The camera also provides transistor-transistor logic (TTL) clocking waveforms, which are converted to metal oxide semiconductor (MOS) voltage levels to control and drive the CCD array. In order to allow a sufficient amount of flexibility, the camera provides different adjustable parameters and interface options for the user. Interface options include selection of an internal or external clock source, a shutter signal, and an internal/external trigger source.