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17 April 1995 Fast VLSI architecture for 8 x 8 2D DCT
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Proceedings Volume 2419, Digital Video Compression: Algorithms and Technologies 1995; (1995) https://doi.org/10.1117/12.206379
Event: IS&T/SPIE's Symposium on Electronic Imaging: Science and Technology, 1995, San Jose, CA, United States
Abstract
Discrete Cosine Transform (DCT) is one of the most popular lossy techniques used today in video compression schemes. It allows to take advantage of the properties of natural images. Indeed thanks to their continuity for small surfaces (typically 8 X 8 pixels), they ask for a more compact description in the frequential plan than in the spatial one. A coupled quantization also brings further compression gain as it is now possible to degrade more the high frequencies of the image to which human eye is less sensitive. The drawback is that DCT puts heavy stress on computational resources and can be a bottleneck to cheap real time video. We here introduce a VLSI architecture which combines excellent performance with a small die size as we use an algorithm which maps very well on silicon. Through a reordering of the samples, regularity and complexity of the computations involved are greatly improved. This allows to divide the process into two parallel parts, one for even samples, the other for odd ones. As the number of coefficients required is decreased, fixed multipliers can be used. A simple join of the two parts' results followed by a normalization merged with quantization will give 8 X 8 2D DCT after a total of 64 cycles.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hughes de Perthuis, E. Bercovici, A. de Grandmaison, and Mohamed Akil "Fast VLSI architecture for 8 x 8 2D DCT", Proc. SPIE 2419, Digital Video Compression: Algorithms and Technologies 1995, (17 April 1995); https://doi.org/10.1117/12.206379
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