22 May 1995 Automatic defect classification: status and industry trends
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Abstract
As device geometries shrink to 0.25 micron and smaller, all facets of integrated circuit (IC) processing are being challenged. With device sizes shrinking, so too shrinks the size of a defect that can cause chip failure, and hence yield loss. Contamination free manufacturing practices are becoming critical for successful device fabrication. To accomplish this, elimination of defect sources has a high priority. A defect can be a particle, microcontamination, pattern anomaly, crystalline defect such as a stacking fault, and so on. Defects have become a main source of yield loss to the semiconductor industry. This comes at a time when 90% yield values on mature product cannot increase at the rate that has occurred in the past. The industry is now faced with finding methods of incremental yield increase, in-line, on production wafers. Automatic Defect Classification (ADC) is an important part of SEMATECH's strategy to meet these industry needs.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Marylyn Hoy Bennett, Marylyn Hoy Bennett, Kenneth W. Tobin, Kenneth W. Tobin, Shaun S. Gleason, Shaun S. Gleason, } "Automatic defect classification: status and industry trends", Proc. SPIE 2439, Integrated Circuit Metrology, Inspection, and Process Control IX, (22 May 1995); doi: 10.1117/12.209203; https://doi.org/10.1117/12.209203
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