Automatic defect classification: status and industry trends

Marylyn Hoy Bennett; Kenneth W. Tobin Jr.; Shaun S. Gleason

doi:10.1117/12.209203

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22 May 1995 Automatic defect classification: status and industry trends

Marylyn Hoy Bennett, Kenneth W. Tobin Jr., Shaun S. Gleason

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Proceedings Volume 2439, Integrated Circuit Metrology, Inspection, and Process Control IX; (1995) https://doi.org/10.1117/12.209203
Event: SPIE's 1995 Symposium on Microlithography, 1995, Santa Clara, CA, United States

Abstract

As device geometries shrink to 0.25 micron and smaller, all facets of integrated circuit (IC) processing are being challenged. With device sizes shrinking, so too shrinks the size of a defect that can cause chip failure, and hence yield loss. Contamination free manufacturing practices are becoming critical for successful device fabrication. To accomplish this, elimination of defect sources has a high priority. A defect can be a particle, microcontamination, pattern anomaly, crystalline defect such as a stacking fault, and so on. Defects have become a main source of yield loss to the semiconductor industry. This comes at a time when 90% yield values on mature product cannot increase at the rate that has occurred in the past. The industry is now faced with finding methods of incremental yield increase, in-line, on production wafers. Automatic Defect Classification (ADC) is an important part of SEMATECH's strategy to meet these industry needs.

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Marylyn Hoy Bennett, Kenneth W. Tobin Jr., and Shaun S. Gleason "Automatic defect classification: status and industry trends", Proc. SPIE 2439, Integrated Circuit Metrology, Inspection, and Process Control IX, (22 May 1995); https://doi.org/10.1117/12.209203

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