26 May 1995 Automated layout of mask assist-features for realizing 0.5 k1 ASIC lithography
Author Affiliations +
The virtues of mask-plane assist features for improving imaging performance of generic ASIC layouts in the 0.5k1 realm has been previously proclaimed. In this report we provide experimental verification and introduce a methodology to automatically deploy these features on ASIC layouts.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Joseph G. Garofalo, Joseph G. Garofalo, Oberdan W. Otto, Oberdan W. Otto, Raymond A. Cirelli, Raymond A. Cirelli, Robert L. Kostelak, Robert L. Kostelak, Sheila Vaidya, Sheila Vaidya, } "Automated layout of mask assist-features for realizing 0.5 k1 ASIC lithography", Proc. SPIE 2440, Optical/Laser Microlithography VIII, (26 May 1995); doi: 10.1117/12.209262; https://doi.org/10.1117/12.209262


Illuminator optimization for projection printing
Proceedings of SPIE (July 25 1999)
SCAA mask exposures and Phase Phirst designs for 100 nm...
Proceedings of SPIE (September 13 2001)
A new methodology for quantifying OPC recipe accuracy
Proceedings of SPIE (November 09 2005)
Impact of mask error on OPC for 45-nm node
Proceedings of SPIE (March 25 2007)
Generating mask inspection rules for advanced lithography
Proceedings of SPIE (November 04 2005)

Back to Top