Some signal processing applications require memory modules with very fast access along predefined scan patterns. If this requirement only holds for standard raster scan (image processing) the simple solution of reading in parallel a number of slower memory chips and using a fast parallel to serial converter is enough. This paper focuses on the problems which appear when more different fast scans patterns are required. In this case the mapping of the data in the memory chips is analyzed by using a combinatorial theory setting. We prove that a mapping which allows two different predefined scan patterns does always exist. For more than two different predefined scans our formalism allows one to construct a mapping, if it does exist. The paper presents several examples with 2 and 4 scan patterns.