Parametral dependence of bilevel-interconnect formation in GaAs ICs/MMICs

Seema Vinayak; B. K. Sehgal; G. Sai Sarvanan; Sindhu Dayal; D. S. Rawal; Akshay A. Naik; R. Gulati; I. Chandra

doi:10.1117/12.221139

15 September 1995 Parametral dependence of bilevel-interconnect formation in GaAs ICs/MMICs

Seema Vinayak, B. K. Sehgal, G. Sai Sarvanan, Sindhu Dayal, D. S. Rawal, Akshay A. Naik, R. Gulati, I. Chandra

Proceedings Volume 2636, Microelectronic Device and Multilevel Interconnection Technology; (1995) https://doi.org/10.1117/12.221139
Event: Microelectronic Manufacturing '95, 1995, Austin, TX, United States

Abstract

The formation of multilevel interconnects in GaAs MMIC fabrication depends mainly on the adhesion of the interconnect metals with the intermediate dielectric and with the substrate. The metal lines in our experimental study were formed by depositing multilayer films by rf sputtering technique over spin-coated polyimide and Plasma Enhanced Chemical Vapor Deposited (PECVD) silicon nitride (Si₃N_x). It is observed that samples with a poor adhesion between the second level metal and Si₃N_x show bubbling of blistering in the metal layer when subjected to subsequent high temperature cycles in the fabrication process. It is also found that the choice of certain metal schemes develops a stress between the first level metal and GaAs at the bond pads which peel off at the time of bonding. The present experimental study was undertaken to avoid the loss of the circuit at such advanced stages of fabrication like bonding or second level interconnect formation. The study brings out the dependence of the bondability of the circuit bond pads and the formation of the interconnect lines on the rf sputtering parameters, the premetallization treatment, the choice of the multilayer metal schemes and the thickness of the metals in the multilayer metallization.

Citation Download Citation

Seema Vinayak, B. K. Sehgal, G. Sai Sarvanan, Sindhu Dayal, D. S. Rawal, Akshay A. Naik, R. Gulati, and I. Chandra "Parametral dependence of bilevel-interconnect formation in GaAs ICs/MMICs", Proc. SPIE 2636, Microelectronic Device and Multilevel Interconnection Technology, (15 September 1995); https://doi.org/10.1117/12.221139

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
12 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Metals

Platinum

Gold

Gallium arsenide

Silicon

Silicon films

Dielectrics

Show All Keywords

Keywords/Phrases

Search In:

Publication Years