In this work we present a systematic study about the metal contamination induced by ion implantation, with the aim to identify contamination mechanisms and possible solutions to the problem. Lifetime measurements have been used in order to evaluate the level of contamination in implented wafers. Lifetime values have been extracted from photocurrent measurments (Elymat technique). Implantations of iron and cromium have been used in order to validate the study of lifetime versus injection level as a technique for the identification of contaminants and for the quantitative evaluation of their concentration. The contamination level in ion implanted wafers has been characterized varying main implantation parameters (species of the implanted ion, dose, current, energy, angle) and surface condition (whether bare or oxidized silicon). Ion implantation is responsible for a a heavy lifetime degradation (i.e. metal contamination), which increases in proportion to implantation dose and comes from the side exposed to the ion beam. The distribution of lifetime over wafer surface provides relevant information. Details of the implanter endstation (e.g., the clamping system) usually show up in wafer maps of lifetime. Results coming from different equipments concur to indicate that contaminants come from material sputtered from the loading disk. This conclusion is confirmed by the dependence of lifetime on implantation energy and tilt angle. The chemical nature of the contaminant can in some cases be identified by injection level spectroscopy. Implantation of heavy ions is mainly responsible for iron contamination; some other impurity (maybe cromium) is detected in boron-implanted wafers. From the point of view of device processing, the problem can be circumvented by implantation through a screening exide. Vice versa gettering techniques remove only a limited fraction of the contaminants introduced during the implantation.

The role of chemical-mechanical polishing (CMP) of ILD and metal layers is increasing as device densities in the ULSI shrink. However, the advantages in film planarization gained with CMP are often offset by contaminants which are abundant in the chemical bath (known as the slurry) to which the wafers are exposed during processing. Such chemistries particularly metallic ions can adversely effect device reliability and performance if left on the wafer or ILD in large densitites. The problem we address is that of detecting such residual contaminants post-CMP on product wafers nondestructively. In this work we look at the effects of ionic residuals in ILD oxides before and after exposure to various methods of CMP. Using an optical methodology known as contact potential differentiation in which the potential across the oxide is separated out from (and compared with) a standard surface barrier measurement, we can passively examine any dramatic charge on the wafer and in the oxide as a result of this process. In this paper this technique will be demonstrated on several CMP samples illustrating the contaminant effects on CMP oxides with results compared to chemical spectroscopy.

FTIR spectra of borophosphosilicate (BPSG) films which are obtained by metal backed configurations are compared to those obtained by the conventional normal incidence transmission geometry. Sensitivity advantages are demonstrated for both hydrogen incorporation and dopant analyses. P-polarized measurements are explored for preferential excitation of vibrational modes. Reflectance measurements of BPSG films on silicon by FTIR and by the emerging techniques of spectroscopic ellipsometry (SE) both in the UV-visible and mid-IR spectral ranges are reviewed. The use of differential and derivative spectral data anlysis is illustrated for investigating structural and compositional changes which occur from film densification and in the course of film storage.

A scanning photon microscope based on ac surface photovoltage (SPV), which can be used to characterize electronic charges in silicon (Si) wafers, is successfully applied for nondestructive detection of metallic contaminants. If Al³⁺ and Fe³⁺ replace Si⁴⁺ in a native oxide, (AlOSi)^- and (FeOSi)^- networks form and a negative charge appears. However, P$5+) acts as a positive charge, possibly in the form of (POSi)⁺. Thermal oxidation causes Al and Fe to segregate at the very top of the thermal oxide and a negative charge survives. Dipping in an aqueous hydrofluoric acid (HF) solution causes a positive charge at wafer surfaces. When n-type Si wafers treated with HF solution are dipped in aqueous solutions containing Fe or Cu ions, the net negative charge is proportionally enhanced as the Fe or Cu concentration increases, resulting in the appearance of an ac SPV.

Recent developments in the measurement of epitaxial silicon thin films enable the doping transition width and the substrate carrier concentration to be measured in addition to the film thickness. A model has been developed to simulate the reflectance spectra of lightly-doped epitaxial silicon films deposited on doped silicon substrates in both the mid- and far-infrared spectral regions. Using a model-based approach eliminates the need for instrument calibration and the addition of a bias to the measurement results. Epitaxial films ranging in thickness from 0.1 to 5.0 micrometers were analyzed. Results using a double-side polished silicon wafer as the reference were similar to those using an absolute gold reference. Thickness and doping transition width measurements are consistent with results obtained using other techniques.

Scatterometry, the analysis of light scaattered by diffraction from periodic structures, is shown to be a versatile metrology technique applicable to a number of processes involved in microelectronic manufacturing. Contemporary inspection technologies such as scanning force microscopy (SFM) and scanning electron microscopy (SEM), apart from being slow and possibly destructive, in general cannot be used in-situ. Scatterometry, on the other hand, is rapid, nondestructive, inexpensive, and has the potential for use in-situ. In the production of a sub-micron microelectronic device, a typical series of process steps could involve the deposition of a poly-Si layer on oxide, followed by the application of an anti-reflection coating (ARC) and resist layer. After the resist is exposed and developed there are four dimensions which will affect further wafer processing: the linewidth of the resist, the resist thickness, and the ARC and poly-Si thicknesses. By varying the angle of incidence and continuously monitoring the diffracted power in any diffraction order, a scatter 'signature' may be obtained. We have demonstrated that there is sufficient information in one signature to determine all these dimensions at once, even when the linewidth dimensions are as small as 0.25 micrometers and the poly-Si thickness is on the order to 2500 angstrom. Results from determining these dimensions on a 25 wafer study show excellent agreement between the scatterometry measurements and measurements made with other metrology instruments (SEM and ellipsometer). For example, there is a 22.6 nm average difference between SEM and scatterometry measurements of 0.25 micrometers nominal linewidths. In addition, the repeatability (1(sigma) ) of this technique is shown to be sub-nanometer for all of the parameters measured (linewidth, resist height, ARC thickness, and poly thickness).

This work is concerned with electron emission induced by an electric field and photoemission assisted by the field. The applied samples were emitters in the shape of semiconducting films evaporated on both sides of a glass substrate of thickness 0,2 mm. One side was an emitting surface whereas the other was a field electrode. The field electrode was supplied by negative polarizing voltage U_pol. The emitting materials were In₂O₃:Sn and titanium films. As a result of applying U_pol and illumination, electrons and photoelectrons are released and enter electron multiplier. Amplitude spectra of pulses were recorded by a multichannel analyser of pulse voltage. Energy analysis of electrons released from the samples was performed by the method of retarding field. Amplitude spectra at a given U_pol and changing retarding field for titanium and oxide layers were compared. It was found that electron energy can exceed even 50eV. For both types of films the influence of illumination of electron emission induced by an electric field was also investigated.

In modern DRAM processes one needs a well defined defect free range called denuded zone. In a depth of several micrometers, a range of precipitated oxygen is used to achieve internal gettering. The usual characterization of oxygen precipitation is done by counting the defects with an optical microscope after cleavage face etching. Therefore one only examines a fraction of the whole wafer. Investigating precipitated wafers after two-step anneals we found a good correlation between the bulk micro detects and the diffusion length using the electrolytical metal tracer (ELYMAT) technique. So we achieved a spatially resolved image of the precipitated bulk. In processed wafers the depth of the precipitate free zone is of great importance. Insufficient denuding decreases the yield of device fabrication drastically. We assumed a two region model (defect free-precipitated region) with two different diffusion lengths L_D in a depth t. Solving the set of differential equations we calculated a 3D picture of denuded zone depth and diffusion length in the precipitated bulk of the wafer. This means for practical application, that it is now possible to detertmine insufficient denuding and to get more information of oxygen precipitation behavior of the whole wafer using an improved ELYMAT technique.

A novel method, the short wavelength laser excited photoluminescence (PL) technique at room temperature, is applied to evaluate carrier lifetime characteristics of silicon epitaxial (epi) layers, which are grown on heavily doped p⁺ substrates with approximately 10¹⁹ cm^-3 of boron. The band-edge PL intensity of the epi-layer is closely related to the carrier recombination lfietime at room temperature. The carrier excitation at 488 nm wavelength and the existence of the p/p⁺ structure, which acts as a stopper for the excess carrier diffusion, enable one to evaluate the epi-layer lifetime characteristics of the epi-layer thicker than 3 micrometers . Applying the method to epi-quality evaluation of the p/p⁺ epi-wafers, trace metallic contamination in epi-layers introduced by the epi- growth processes has been evaluated successfully. It has been found that a dilute HF cleaning is enough for the sample preparation instead of surface passivation heat treatment, which is usually required for other lifetime measurements. This is a great advantage of the method which enables one to do an in-line epi-quality monitoring. We also found that molybdenum contamination degraded the epi-lifetime and the time dependent dielectric breakdown of thin oxide films grown on p/p⁺ epi-wafers in this study.

External gettering of iron by thin polycrystalline silicon film in p-type CA silicon has been investigated using deep level transient spectroscopy, and the surface photovoltage method. Depth profiles of iron concentration indicated a sharp gradient in the Fe concentration near the polycrystalline silicon/substrate interface. Concurrent decrease in the micority carrier diffusion length was also observed in the same region. The majority of iron gettering from the bulk silicon was found to be associated with the enhancement of the internal gettering. The presence of small oxygen precipitates/nuclei generated by prolonged heat treatment in the range of 600C-700C was found to prevent regeneration of FeB pairs at the room temperature. Similarily, carbon in the bulk silicon was found to retard the regeneration of the pairs. On the other hand, large precipitates formed at 1000C do not influence the diffusion or the recombination of Fe_i with B^- to form FeB pairs.

Exact kinetics of donor formation and possible number of oxygen atoms in a single TD are two aspects out of many problems related with oxygen related donors in CZ-silicon, which carry a mark of interrogation. Boron doped p-type silicon wafers were annealed in air ambient at 450 degrees C for different durations and subjected to resistivity and FTIR studies. It was observed that ambients do not affect the process of TD generation. Successive increase in annealing times results in the exponential growth of donors with a maximum of approximately 1.79 X 10¹⁷ cm^-3 obtained in our samples annealed for 55 hours only. Annealing also caused a gradual decrease in absorption coefficient. Maximum observed value of oxygen and carbon precipitations was 2.362 ppma and 1.100 ppma respectively. The diffusion coefficient for oxygen was found to be approximately 4.17 X 10^-19 cm^-9S^-1. The oxygen and carbon reduction followed the second order kinetics. The activiation energy was approximately 0.823 eV and the number of oxygen atoms in a single TD may be 7.

We have developed optical methods for nondestructive measurements of the depth distribution of defects and carrier concentrations in crystalline Si as well as for in-situ monitoring of the initial growth processes of thin oxide layers on Si surfaces based on angle-resolved ellipsometry combined with a computer analysis of the ellipsometric data. Damage profiles in ion-implanted Si wafers have been determined by numerically solving the Maxwell equations for the three-layer system including the surface SiO₂ layer, amorphous Si layer, and transition layer on the Si substrate. Depth profiles of carrier concentrations in shallow-doped Si samples have been estimated based on CO₂ laser ellipsometry with a wavelength of 10.6 micrometers using the infrared ellipsometric parameters as a function of the incident angle. Changes in the thickness and refractive index have been observed during the initial oxide growth on Si surfaces with various chemical treatments using visible-laser ellipsometry and the growth mechanisms of the natural oxide layers on Si have been investigated. Spectroscopic ellipsometry has been also applied to analyze the dielectric functions of amorphous Si films prepared by various methods such as ion-implantation, electron-beam evaporation, and plasma-enhanced chemical vapor deposition.

Silicon lattice damage and contamination caused by plasma etching have been well documented. The typical techniques for measuring the silicon damage depth are TEM (transmission electron microscopy) and RBS (Rutherford back scattering). This paper shows that by using optical tecniques; BPR (beam profile relfectometry) and BPE (beam profile ellipsometry), accurate damage thickness can be obtained. Characterization of the silicon substrate damage and surface contamination leads to an understanding of the etch process. In this case, the LDD (lightly doped drain) spacer etch process is evaluated. This etch is used to form oxide spacers on the sidewall of the polygate, exposing the silicon substrate to the plasma after the oxide clears at the end of the etch step. The silicon must have minimal polymer on the surface and minimum silicon damage to assure reliable electronic devices. The silicon damage and polymeric surface contamination cuased by LDD spacer oxide etching on a split powered diode system is quantitatively analyzed. The thickness of the polymeric film and the damage layer are obtained by BPR and BPE. Results show damage to the silicon to be intensive, approximately 70 to 140 angstrom deep for the moderately damaged layer and approximately 160 to 360 angstrom for the lightly damaged layer. Comparison of the damage thickness obtained by BPR to the damage thickness obtained by TEM is performed. The correlation indicates that the technique of BPR provides a good measure of the actual damage layer thickness. The thickness of the polymer obtained by BPE is 50 to 80 angstrom which corresponds to the values obtained by TEM.

In an introduction, problems of modern thin film research and production of thin films are discussed. Possible solutions with different measurement methods like nulling ellipsometers, RAE-ellipsometry, spectroscopic ellipsometry, and interferometry are compared. RAE- ellipsometry with respect to precision for thin films below 100 angstrom are discussed. Repeatabilities of below 0.1 angstrom are shown. Thicker films even above a few microns can be evaluated with multi-wavelength measurements at distinct wavelengths at 543 nm, HeNe, 790 nm, IR 1.3 micrometers , and IR 1.5 micrometers . This interferometer emulation concept is practically free of order ambiguity--a problem with traditional ellipsometry. Multiple wavelengths are also used to characterize multilayers such as ONO, OPO, etc. with multiple results. Multiple wavelength ellipsometry is compared to multiple incidence angle ellipsometry. For multilayer stacks (transparent or absorbing) the SPI program was developed and is shown. In this program the known parameters as well as the to-be-measured parameters can be selected (substrate value, refractive index, k-value, thickness). Measurement spotsize effects are discussed--high lateral resolution measurements are presented.

Surface photovoltage (SPV), a contactless optical technique for measuring minority carrier lifetime, is used to quantify the relationship between silicon iron contamination level and thin gate oxide integrity. Iron concentration levels in the range of 1 X 10¹⁰ cm^-3 to 5 X 10¹³ cm^-3 are evaluated for oxide thicknesses of 8 to 20 nm. Ramp voltage electrical breakdown and time dependant dielectric breakdown measurement on the iron contaminated gate oxide capacitors are reported. Distinct iron contamination threshold limits based on defect density and gate oxide integrity evaluate cleaning efficiencies and metallic cross contamination effects during thermal processing contamination. Iron-silicide precipitation kinetics are investigated by the lifetime analysis procedure.

The use of electron showers (flood guns) during ion implantation has been used industry-wide to compensate the parasitic effects of electrostatic charging induced by energetic ion beams impinging on the surface during processing. Moreoever for damage protection the wafer may be covered by a protective oxide which inhibits the majority of secondary electrons in the exposure path from reaching the wafer surface. Previous work has shown that the surface barrier of the oxidized surface does not change significantly when flood guns are used which supports this premise. However, in this work we are interested in what effects the electron exposure may have on the oxide potential.

During processing of microelectronic devices, the silicon substrate is typically subjected to a cleaning process in order to prepare its surface for deposition of various layers of thin films. Usually the cleaning process creates a damaged surface layer, which in turn can affect the characteriscs of a deposited film. In particular, plasma cleaning characterization technique that can simultaneously and unambiguously determine the thickness and n and k spectra of the damaged surface layer is described. The technique can be used for sustaining engineering, quality control, and research and development as a means to optimize the surface characteristics of silicon wafers subjected to plasma cleaning.

The structure, fabrication, and theory of a 3D planarized optoelectronic clock signal distribution device, based on a thin light-guiding substrate in conjunction with a 2D polymer holographic grating array, are described. We have previously demonstrated a 25 GHz 1-to-42 (6 X 7) highly parallel fanout interconnect with a signal to noise ration of 10 dB¹. In this paper, theoretical work focused on generating a globally uniform fanout distribution is presented. An objective function aimed at equalizing the intensities among the fanout beams is established and optimization results are reported. Finally, the angular misalignment and wavelength dispersion problem are further discussed, together with their tolerance requirements on the size of the photoreceivers and the bandwidth of the vertical cavity surface emitting lasers integrated on the multi-chip-modules.

The intrafiled image displacement with the various illumination apertures (conventional, quadrupole, annular) was studied and its influence on the actual overlay accuracy was estimated quantitatively. It was found that deviation of the distortion components of modified illumination apertures from conventional aperture (NA 0.57, (sigma) 0.6) brought about the overlay between conventional and modified illumination-exposed layers within +/- 10nm in the full-field (22mm²). Quadrupole and annular apertures with high oblique illumination ((sigma) _out > 0.6) showed relatively lower in absolute magnitude of distortion components and narrower in fluctuation span across the field compared to conventional aperture. However, apertures with low oblique illumination ((sigma) _out < 0.5), also having small opening area, revealed the contrary results. In the telecentricity study, modified illumination apertures were seen to have the better characteristics than conventional apertures, which implies that more serious deviation of overlay could occur if the two layer were exposed at the different defocus conditions, let alone the different illumination apertures. From these results, it seems obvious that there are some relationships between the intrafield image displacement of the projection lens and the geometrical shape of the illumination aperture. In thep ractical reason, we have suggested the scheme with the magnification correction for the exposure step to minimize the overlay errors, which has its basis on the telecentricity characteristics for each apertures.

In contrast to volume holographic material where 1-to-many fanouts are realized using multiplexed volume holograms, we report in this paper the first Si-based surface relief polygonal gratings aiming at optical clock signal distribution application. Surface relief grating with 1 micrometers period (0.5 micrometers feature size) was fabricated using reactive ion beam etch. Both hexagonal and square gratings were demonstrated for 1-to-4 and 1-to-6 fanouts. Surface- normal input and output coupling schemes were carried out with efficiency as high as 65%. Employment of substrate modes in silicon instead of the guided modes greatly releases the required grating spacing for the demonstrated two-way surface-normal coupling. Clock signal distribution operating at 1.3 micrometers with 7.5 GHz clock speed was demonstrated with signal to noise ratio as high as 60 dB.

For the realization of high breakdown voltages, power devices require a thick silicon layer with high resistivity. Therefore, the density of detrimental defects in the electrically active device regions must be extremely low to obtain low leakage currents, low on-state voltages and good stability of the electrical data. Contamination analyses have shown that considerable diffusion of heavy metals into Si wafers can occur due to improper processing. In order to assess the influence of heavy metals on carrier lifetime in power devices, optical analyses of the carrier lifetime and its lateral distribution were performed by the Elymat, the microwave photoconductive decay and the surface photovoltage method. Furthermore, we applied a method based on collector current decay. Contaminations acting as donors were ivnestigated by laser-induced free charge carriers resulting in a lateral voltage drop in the case of lateral doping inhomogeneities. Vertical carrier and temperature profiles have been analyzed by the internal laser deflection method. Comparing the results of all these measurements with the influence on the electrical data, it is found that the electrical data of power devices are very sensitive to contamination.

The effects of Cu in silicon as a contaminant ion have been studied by many groups. As a result its effect on gate oxide integrity through surface defect decoration and retardation of thermal oxide growth have become recognized problems for both VLSI and ULSI. However its effects on surface charge, interface states, and minority carrier generation with different oxides are not as well-known. The ability to study Cu-induced surface defects directly from surface cleans or etch processing is reduced by the addition of other contaminant species or compromising effects from the additional process steps required to fabricate C-V test capacitators. In this study we address this problem by using a frequency-swept, high injection surface photovoltage method which follows the direct, ex-situ examination of the surface barrier condition and interfacial states affecting generation lifetime. To investigate this problem we have generated a variety of Cu-contaminated samples fabricated by ion implantation and buffered-oxide-etch over three oxide thicknesses and two target Cu surface concentrations. By using a passive optical probe, we present for the first time direct observation of surface state conditions due to the presence of Cu integrating both electrical and chemical phenomena.

Radio-frequency photoconductance decay (RF-PCD) is a contactless method of measuring minority carrier lifetime in silicon. Low detection limits and speed of measurement makes this method ideally suited for in-situ determination of silicon wafer passivation and contamination processes. Comparative measurements of copper contamination of silicon surfaces using RF- PCD and TXRF yield a detection limit of about 10⁹ Cu/cm². The fast detection of changes in surface defects enables the time resolved observation of surface passivation breakdown due to the exposure of the wafer to controlled atmospheres. While nitrogen does not attack the surface passivation, oxygen exposure results in immediate native oxide growth.

Properties of near-sruface microdefects (NSMDs) 0-10 micrometers deep of Czochralski-Si wafers have been analyzed to understand how the as-grown crystal qualities are related to the NSMD characteristics after a CMOS thermal simulation. The microdefects are observed by an infrared interference method after a preliminary study to find the optimum condition for the high-sensitivity measurements. The results are compared with those by the infrared laser scattering tomography. Size distribution of the observed microdefects are analyzed to classify them into 'large-size' group and 'small-size' group. Comparing the NSMD characteristics after the CMOS process with those for the as-grown wafers, density of the relatively 'small- size' NSMDs is found to increase by the amount 10⁵-10⁶cm^-3 during the CMOS proces. The increase is especially notable for the wafers with low as-grown microdefect densities. In addition, these NSMD characteristics are shown to be related to the qualities of the MOS gate oxide films formed on the CMOS processed wafers. The time-zero dielectric breakdown characteristics are correlated with the NSMD density. On the other hand, the time-dependent dielectric breakdown characteristics are related to the amount of 'small- size' NSMDs generated during the CMOS process.

In this paper, we investigate coherent light scattering from patterned surfaces, patterned surfaces with defects, spherical particles, and nonspherical particles. Experimental and theoretical results are compared quantitatively to verify the model accuracy. Experimentation involves the usage of the Arizona State University/Semiconductor Research Corporation die and particles deposited on bare silicon wafers. This die contains numerous 3D structures of varying sizes representative of current and future design geometries. Polystyrene particles are deposited on the die and their position is verified with the aid of an optical microscope. The sample is then scanned using the ASU test apparatus which allows angle resolved data collection for the surface structures and the structure with the particles. Comparison between the two data sets are made to determine experimentally the particle/pattern interaction. Collected data is also quantitatively compared to theoretically determined values to verify model accuracy. Light scattering and SEM photographs are acquired for the same individual particles to allow accurate modeling.

A laser scanning system designed for inspection of patterned wafers is described. This system addresses the inspection needs for 64 Mb (0.35 micrometers ) and 256 Mb (0.25 micrometers ) DRAM process technologies. The system is capable of detecting contaminant particles and planar pattern defects on memory and logic devices. The throughput of the system is designed for 30 wafers (200 mm in diameter) per hour. The beam at 488 nm is brought to a focal spot and is scanned on the wafer surface using an acousto-optic deflector (AOD). The entire wafer is scanned under oblique illumination in narrow strips in a serpentine fashion. The specular beam is collected and processed in, what we have named, the autoposition sensor (APS) to servo- lock the height position of the wafer during the scan. The system utilizes multiple independent collection channels positioned around the scan line and it is possible to select the polarization of the collected light for enhanced signal-to-background ratio. The engineering tradeoffs for realizing a system with high throughput and sensitivity are formulated and discussed. Calculations ilustrating scattering from submicron size particles under various polarization conditions are shown. These results lead to optimum design for collection optics. The APS channel is described and illustrated by results indicating that it is possible to keep the surface height of the wafer constant to within 0.4 micrometers in the presence of large changes in topography and wafer reflectivity. Results obtained from a range of production wafers demonstrating detection of 0.1 micrometers anomalies on bare wafer, 0.3 micrometers on memory devices, and 0.4 micrometers on random logic structures are presented.

Fourier-transform infrared spectroscopy and spectroscopic ellipsometry are used to determine the composition and thickness of the fluorocarbon polymer formed during etching of silicon dioxide films on silicon substrates using C₂F₆ in a high- density plasma. The fluorocarbon polymer is characterized as the key process parameters are systematically varied.

A TAB package inner lead interconnect is characterized experimentally by thermal time- domain reflectometry. In order to estimate the low frequency thermal characteristic impedance of the lead in a module substrate, we apply TPA (total pulse area) steady state methodology to analyze transient TTDR measurements. TAB ILB bond thicknesses are measured and compared with estimates of the thermal resistances of short portions of the inner leads terminating at the ILB. The ILB thermal constriction and contact resistance of the bonds measured appear to be negligible compared to the lead resistance.

The high demand for advanced, high speed and lower power MPU/ASIC and memory products has boosted the volume and revenue growth of the whole semiconductor industry during the past several years. The evolution of semiconductor technology is also gaining a lot of momentum due to the requirement/competition of the device performance advancement, power supply scaling and the breakthrough of key process equipment and technology. It used to be that memory products drove the new generations of technology. Recently, it is seen that MPU and logic products are driving the performance and density even faster than memories. All products are taking advantage of the technology and equipment advancements to shrink the device for cost reduction and performance enhancement. These new products are being introduced with high speed to the market and to volume production. This fast growing and fast changing environment will provide many challenges to the business management. Some key issues like business environment changes, technology scaling, mass production and management leadership requirements will be discussed in detail.