20 May 1996 Integrated process for smart microstructures
Author Affiliations +
An eight-mask integrated process for smart microstructures is presented, based on an enhancement-depletion NMOS circuit process and a two-layer polysilicon surface micromachining process. Design and fabrication issues, such as circuit encapsulation, interconnect, and thermal budget are addressed. Two types of micromechanical structures, microcantilever beams and shear stress sensors, were fabricated with on-chip signal conditioning circuits. Electrical test results on circuitry both integrated and not integrated with micromechanisms are discussed. Electromechanical test data demonstrating the resonant frequency of integrated microcantilever beam structures is presented as well as calibrated flow channel data for micromachined shear stress sensors.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tao Pan, Tao Pan, Jeffery M. Melzak, Jeffery M. Melzak, Steven Garverick, Steven Garverick, Mehran Mehregany, Mehran Mehregany, "Integrated process for smart microstructures", Proc. SPIE 2722, Smart Structures and Materials 1996: Smart Electronics and MEMS, (20 May 1996); doi: 10.1117/12.240432; https://doi.org/10.1117/12.240432

Back to Top