27 May 1996 Optimization of electron-beam lithography for super-low-noise HEMTs
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Abstract
This paper reports on electron beam lithography for super low noise HEMT (high electron mobility transistor)s. For the optimization of the electron beam lithography for the HEMTs, the SPACING (spacing between the footprint and the head patterns) and the dosage for the head and the footprint to define 0.1 micrometers T-shaped gates with wide head at 30 kV acceleration voltage were investigated by experiment and Monte Carlo simulation. We also compared the single exposure method with dose split method. The footprint of 1 pixel line is to be 0.1 micrometers and the head size to be larger that 1 micrometers when the dosage of the footprint is 700 (mu) C/cm2, the SPACING is 3 pixels and the head dosage is 60 (mu) C/cm2. Using this optimized technique, a T-shaped gate of 0.1 micrometers level with a high ratio of gate head size to footprint, larger than 10, was obtained, and a AlGaAs/InGaAs/GaAs pseudomorphic HEMT with 0.13 micrometers T-shaped gate was successfully fabricated. The HEMT device exhibited very low noise figures of 0.34 dB and 0.49 dB at 12 GHz and 18 GHz, respectively.
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Sang-Soo Choi, Jin-Hee Lee, Hyung-Sup Yun, Hai Bin Chung, Sang-Yun Lee, Hyung Joun Yoo, "Optimization of electron-beam lithography for super-low-noise HEMTs", Proc. SPIE 2723, Electron-Beam, X-Ray, EUV, and Ion-Beam Submicrometer Lithographies for Manufacturing VI, (27 May 1996); doi: 10.1117/12.240490; https://doi.org/10.1117/12.240490
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KEYWORDS
Head

Field effect transistors

Electron beam lithography

Polymethylmethacrylate

Optical alignment

Photography

Scanning electron microscopy

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