Anti-reflection technology is necessary for controlling line widths. Minimization of the line width deviation in the gate layer is particularly important for improving yields and stabilizing device performance. We have developed a novel anti-reflection effect monitor (AREM) for the optimization of anti-reflection coating materials. Generally, the anti-reflection effect is quantified as the amplitude of the resist sensitivity curve against the resist thickness on an anti- reflection coated substrate. In AREM, a sample wafer is prepared with a gate structure and LOCOS step. Then anti-reflection material is deposited on the wafer and resist is subsequently coated on it. Here, the resist thickness changes gradually away from the step. Hundreds of isolated lines are patterned parallel to the LOCOS step at 0.1 micrometers intervals away from the step. Then each line's width is measured with an electrical probe and the curve of the line width versus the distance from the step is obtained, corresponding to the resist sensitivity curve against resist thickness. AREM is very accurate and can quantify the anti-reflection effect as a line width deviation.