7 June 1996 High-speed custom VLSI DSP systems
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In this paper we examine the use of a recent innovation, called the logarithmic residue number system or LRNS, as an alternative to conventional DSP processors for implementing multiply-accumulate operations. We have fabricated a custom VLSI processor based upon this technology that is capable of providing substantial acceleration of vector arithmetic operations, convolution, correlation, and Fourier transforms in a relatively small, fast processor core when compared with implementations based on conventional arithmetic. The constituent arithmetic elements can be used as standard cells to implement application specific DSP designs.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jonathon D. Mellot, Jonathon D. Mellot, Michael P. Lewis, Michael P. Lewis, } "High-speed custom VLSI DSP systems", Proc. SPIE 2750, Digital Signal Processing Technology, (7 June 1996); doi: 10.1117/12.241986; https://doi.org/10.1117/12.241986

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