28 May 1997 MOSFET solid state switching circuit improves the 0 to 99% rise time for framing camera deflection electronics
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Proceedings Volume 2869, 22nd International Congress on High-Speed Photography and Photonics; (1997); doi: 10.1117/12.273477
Event: 22nd International Congress on High-Speed Photography and Photonics, 1996, Santa Fe, NM, United States
Abstract
We have improved the 0 to 99% rise time voltage on our 2 frame deflection plates from 160 nS to 65 nS with the addition of a peaking circuit that works in conjunction with our primary 2 frame deflection circuitry. Our peaking technique has applications to other HV pulsers including those which must drive 51 ohm loads. Generally, rise time voltages are measured between 10 and 90%. To minimize the camera image blur resulting from the dynamic influence of deflection plate potentials acting on photocathode electrons, it was necessary to design a circuit that would rise from 0 to the 99% voltage level in under 100 nS. Once this voltage was reached, it was necessary to stay within 1% of the attained voltage level for a duration of 1 uS. This was accomplished with the use of MOSFET solid state switching.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Anthony T. Rivera, Stan W. Thomas, "MOSFET solid state switching circuit improves the 0 to 99% rise time for framing camera deflection electronics", Proc. SPIE 2869, 22nd International Congress on High-Speed Photography and Photonics, (28 May 1997); doi: 10.1117/12.273477; https://doi.org/10.1117/12.273477
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KEYWORDS
Field effect transistors

Cameras

Electrons

Capacitors

Switching

Solid state electronics

Transformers

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