Defect mapping and repair in UltraSPARC-I microprocessor memories

Siva Paramanandam; Lynn Youngs

doi:10.1117/12.250827

12 September 1996 Defect mapping and repair in UltraSPARC-I microprocessor memories

Siva Paramanandam, Lynn Youngs

Proceedings Volume 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II; (1996) https://doi.org/10.1117/12.250827
Event: Microelectronic Manufacturing 1996, 1996, Austin, TX, United States

Abstract

Yield is perhaps the single most important measure of manufacturing efficiency for large integrated circuits like UltraSPARC-I. To accelerate continuous yield improvement, we have integrated memory test, repair, and defect mapping into the UltraSPARC-I manufacturing flow. We use the UltraSPARC-I memory test port, together with standard memory test equipment and integrated software, to detect, locate and repair defects in the larger memory arrays. Pattern- recognized memory defect maps are collected for every chip manufactured, accelerating the understanding of defects and their causes. As part of the manufacturing process, we also program a unique identity into each chip that can be read electronically. In this paper, we present the memory defect mapping system that has been established and our use of that system to accelerate yield learning.

Citation Download Citation

Siva Paramanandam and Lynn Youngs "Defect mapping and repair in UltraSPARC-I microprocessor memories", Proc. SPIE 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, (12 September 1996); https://doi.org/10.1117/12.250827

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