Fault isolation with fanin tree technique

Kang Siong Ng

doi:10.1117/12.250838

12 September 1996 Fault isolation with fanin tree technique

Kang Siong Ng

Proceedings Volume 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II; (1996) https://doi.org/10.1117/12.250838
Event: Microelectronic Manufacturing 1996, 1996, Austin, TX, United States

Abstract

With the ever increasing complexity in IC design and with the introduction of flip chip technology, the pressing need for computer aided fault isolation (FI) is sensed. Fanin tree is a collection of subsequent fan-in signals with respect to a given node. As such, possible failing locations can be narrowed down to nodes that reside within the fanin tree only. Multiple fanin trees from multiple known failing nodes can also be intersected to locate common driving nodes. This paper presents an application program that was developed for Intel standard (.sch) netlist format. The result is FTREE; a fanin tree tool that is independent of product. This tool enhances the performance of other FA tools; but for its optimum usage, proper scan node selection is required during design stage. Selection of these nodes also is presented.

Citation Download Citation

Kang Siong Ng "Fault isolation with fanin tree technique", Proc. SPIE 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, (12 September 1996); https://doi.org/10.1117/12.250838

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