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10 April 1997 Self-passivated copper gates for amorphous silicon thin film transistors
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Abstract
A solution to the thin film silicon transistor gate metallization problem in active matrix liquid crystal displays is demonstrated in the form of a self-passivation process for copper. Bottom-level copper (Cu) lines are passivated by a self-aligned chromium oxide encapsulation formed by surface segregation of chromium (Cr) from dilute Cu1-xCrx alloys at 400 degrees C. The encapsulation is an efficient barrier for Cu diffusion into the SiNx gate insulator during the plasma deposition and transistor processing, and solves the problems of oxidation and adhesion to the glass substrate without introducing additional mask steps into the manufacturing process. Gate line resistivities of 4.5 (mu) (Omega) cm are obtained. The performance of self-passivated Cu-gate thin film transistors is comparable to that of transistors with refractory metal gates.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Henning Sirringhaus, Antoine Kahn, and Sigurd Wagner "Self-passivated copper gates for amorphous silicon thin film transistors", Proc. SPIE 3014, Active Matrix Liquid Crystal Displays Technology and Applications, (10 April 1997); https://doi.org/10.1117/12.270301
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