17 January 1997 Architectural approaches for multimedia processors
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This paper presents an overview on architectures for multimedia purposes. Emphasis is given on flexible, programmable processors to enable processing of different standardized or proprietary multimedia applications. Several parallelization strategies to enhance performance especially for video coding are described. This includes architectures like SIMD, MIMD and associative controlling. Exploitation of instruction-level parallelism by use of techniques like VLIW and packed-arithmetic extends this discussion. Reference to design examples from the literature is given. To help develop cost-effective architectures for a set of applications, two methods for modeling hardware and algorithms are explained. Instrumentation of algorithms implemented in software is discussed as a method to determine characteristics and features of given algorithms. Additionally, a more general approach is presented that analyzes different parallelization potentials for a class of algorithms. These are mapped on a simple hardware model using only a few parameters for performance evaluation. Limitations of software instrumentation and the presented modeling approach are discussed.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Peter Pirsch, Peter Pirsch, Achim Freimann, Achim Freimann, Mladen Berekovic, Mladen Berekovic, } "Architectural approaches for multimedia processors", Proc. SPIE 3021, Multimedia Hardware Architectures 1997, (17 January 1997); doi: 10.1117/12.263503; https://doi.org/10.1117/12.263503


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