Translator Disclaimer
Paper
7 May 1997 Implementation of MPEG-2 encoder to multiprocessor system using multiple MVPs (TMS320C80)
Author Affiliations +
Abstract
This paper presents the efficient algorithm mapping for the real-time MPEG-2 encoding on the KAIST image computing system (KICS), which has a parallel architecture using five multimedia video processors (MVPs). The MVP is a general purpose digital signal processor (DSP) of Texas Instrument. It combines one floating-point processor and four fixed- point DSPs on a single chip. The KICS uses the MVP as a primary processing element (PE). Two PEs form a cluster, and there are two processing clusters in the KICS. Real-time MPEG-2 encoder is implemented through the spatial and the functional partitioning strategies. Encoding process of spatially partitioned half of the video input frame is assigned to ne processing cluster. Two PEs perform the functionally partitioned MPEG-2 encoding tasks in the pipelined operation mode. One PE of a cluster carries out the transform coding part and the other performs the predictive coding part of the MPEG-2 encoding algorithm. One MVP among five MVPs is used for system control and interface with host computer. This paper introduces an implementation of the MPEG-2 algorithm with a parallel processing architecture.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
HyungSun Kim, Kenny Boo, SeokWoo Chung, Geon Young Choi, YongJin Lee, JaeHo Jeon, and Hyun Wook Park "Implementation of MPEG-2 encoder to multiprocessor system using multiple MVPs (TMS320C80)", Proc. SPIE 3031, Medical Imaging 1997: Image Display, (7 May 1997); https://doi.org/10.1117/12.273962
PROCEEDINGS
10 PAGES


SHARE
Advertisement
Advertisement
Back to Top