7 July 1997 0.25-μm multilevel interconnect with DUV processing
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Abstract
Decreasing critical dimensions and pitch at metal and hole levels requires the use of Deep-UV processing. Associated with this processing are issues of resist-substrate interactions, small process margins, and increasing aspect ratios forcing the modification of etch processes. In overcoming these issues at metal, we evaluate resist profiles on TiN, oxide hard mask, organic BARC and Ti metal. In all cases we see an improved profile when compared to resist on TiN. Electrical performance is compared in terms of linewidth, process linearity, and isolated to dense line bias for TiN, oxide hard mask, and Ti. Post etch electrical CD repeatability results are presented for TiN, Ti, and oxide. Cross section micrographs demonstrate consistent metal post etch profiles regardless of the metal stack. Results show the process is scaleable to 0.36 micrometers pitch metal. For hole patterning we see a major obstacle is achieving the required resolution capability with sufficient process latitude. We investigate the process margin for 0.25 micrometers contacts on BPSG substrates and the effect of pitch on the contact dimensions. Evaluation of the contacts after etch shows vertical sidewalls. The ability to extend the process to 0.20 micrometers is also explored. The results presented in this discussion demonstrate some of the issues and requirements for Deep-UV processing. With this technology we must explore the use of interfacial layers to overcome resist interactions with substrates and consider what might be non-standard processing to achieve desired results.
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William L. Krisa, Sonya Yvette Shaw, Ken Brennan, Girish A. Dixit, Manoj K. Jain, "0.25-μm multilevel interconnect with DUV processing", Proc. SPIE 3051, Optical Microlithography X, (7 July 1997); doi: 10.1117/12.275976; https://doi.org/10.1117/12.275976
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