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7 July 1997 Minimization of total overlay errors on product wafers using an advanced optimization scheme
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Abstract
The matching of wafer steppers is accomplished typically by patterning two successive layers, using different steppers of interest for each layer, and measuring the overlay at many points in the exposure field. Matching is considered to be optimized when some metric, such the sum-of-squares of overlay errors, is minimized over all measured points within the field. This is to be contrasted to the situation which arises during the in-line measurement of overlay errors in production, where a far more limited sampling of points is involved. There are several consequences to limited sampling. Adjustable intrafield overlay components, such as magnification, may appear to vary up to several parts-per- million as a consequence of varying chip size. These variations are substantially larger than the normal variations of these components for fixed field sizes, and so have significant consequences for the application of statistical methodologies to the control of overlay components. The width of the distribution of overlay errors across the field may typically increase between 10 to 20 nm (3(sigma) ), with even larger increases in mean shifts, all varying with field size. Reticles may also introduce similar variations, both random and systematic. Reticle beam-writer errors lead to systematic intrafield errors, particularly asymmetric field magnification and field skew. Steppers may compensate for these systematic reticle errors, and step- and-scan systems are more effective at this compensation than step-and-repeat machines. For steppers which have process dependent alignment, this compensation must be determined on products, which leads back to the problems associated with limited sampling. Correction for the overlay errors induced by limited sampling may be accomplished by look-up tables incorporated into the overlay analysis software. For each pair of steppers and each sampling plan, corrections can be applied at each measurement point in order to bring the full field and limited sampling plans into consistency. This will lead to a true minimization of overlay on product and will stabilize statistical process control of overlay components.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Harry J. Levinson, Moshe E. Preil, and Patrick J. Lord "Minimization of total overlay errors on product wafers using an advanced optimization scheme", Proc. SPIE 3051, Optical Microlithography X, (7 July 1997); https://doi.org/10.1117/12.275996
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