Real-time image reconstructor ASIC

Carlos Augusto Paiva da Silva Martins; Joao Antonio Zuffo; Sergio Takeo Kofuji

doi:10.1117/12.280629

22 July 1997 Real-time image reconstructor ASIC

Carlos Augusto Paiva da Silva Martins, Joao Antonio Zuffo, Sergio Takeo Kofuji

Proceedings Volume 3074, Visual Information Processing VI; (1997) https://doi.org/10.1117/12.280629
Event: AeroSense '97, 1997, Orlando, FL, United States

Abstract

This paper shows an architectural proposal for an application specific integrated circuit (ASIC) designed to perform image reconstruction in real time. This architecture implements in hardware the reconstruction technique, called 2D normalized sampled finite sinc reconstructor (NSFSR 2D), which has been formerly proposed and implemented in software. We develop an ASIC that implements NSFSR 2D technique as a dedicated static pipeline architecture. We model and simulate this architecture using VHDL hardware description language. Based on analysis of the validation results, we conclude that the proposed architecture implements the NSFSR 2D correctly and is optimized in performance when compared with a software-based implementation.

Citation Download Citation

Carlos Augusto Paiva da Silva Martins, Joao Antonio Zuffo, and Sergio Takeo Kofuji "Real-time image reconstructor ASIC", Proc. SPIE 3074, Visual Information Processing VI, (22 July 1997); https://doi.org/10.1117/12.280629

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