An excimer laser microstepper, intended for R and D studies of 193nm lithography, is described. System details such as the laser performance, beam transport, wafer handling and photoresist processes are outlined.

This paper describes methods in defining sub-350nm contact holes with i-line stepper.Topography is a challenge to contact hole patterning in particular. Optical enhancement technique of halftone phase shift mask and off axis illumination are used. Experimental investigation of focus drilling method and application of organic bottom anti- reflective coating over topographical substrate are shown. The capability of i-line lithography at the 300nm regime of contact patterning over topographical substrate are described; and an acceptable process latitude is demonstrated.

DUV lithography is rapidly becoming the technology of choice for the manufacture of semiconductor devices with minimum geometry features below 0.35 micrometers . Beyond traditional exposure performance metrics such as depth of focus and exposure energy latitude, the enhanced sensitivities of chemically amplified resists to process parameters including airborne amine concentration, post exposure delay time, and post exposure bake temperature significantly affect the available process window. A critical dimension error budget model is used to compare experimentally determined wafer-to- wafer, within-wafer and intrafield linewidth variation against predicted values based on measured process sensitivities and tool performance parameters. The relative error contributions due to each source of linewidth variation and each technology component of the lithography process are discussed. Post exposure bake temperature is identified as a significant contributor to the measured within-wafer linewidth variation of 10.4 nm at 3 (sigma) when using APEX-E photoresist. Photomask linewidth non-uniformity is identified as a significant contributor to the measured intrafield variation of 15.8 nm at 3 (sigma) .

In this paper, we report a simple direct-write patterning process for the conjugated polymer polythiophene based on ultraviolet laser ablation. The polythiophene films were prepared by electrochemical polymerization. A custom built dual function lithography system based on a 325nm CW He-Cd laser was used for patterning the films. Ablation was observed for an incident power density of 286kWcm^-2. Grooves with widths in the range of 2-3 micrometers have been fabricated. This process does not involve resist masks and any wet development step. The insolubility of polythiophene suggests that it can be used as a positive self-developing resist. Alternatively, the ablated patterns can be sued directly as device structures. The present process may have applications in polymer electronic devices and micromachining.

Different models for model-based Optical Proximity Correction have been recently developed for improving the printability of IC designs. Each model has its own area of application and it can be verified by experiments or by using a calibrated photoresist simulator that can predict 3D shapes with enough accuracy and acceptable performance. In this work we describe the use of 3D photoresist simulation for exposure, post-exposure bake and development on planar substrates to study the characteristics of different models for model-based OPC. We also introduce a new OPC tool that it is based on an automated procedure for layout modification and fast 3D simulation of exposure, PEB and development.

It was demonstrated that optical lithography simulations can be used very effectively for broadband application and they are not the forte of I-line lithography. PROLITH simulator was used to optimize the photo process on Ultratech 1500 broadband stepper. More than 40 process variables were required to customize the software for this process. To do a broadband simulation the optical parameters of photoresist should be measured accurately on multiple wavelengths. This information not always available from photoresist vendors and often tedious to obtain by means of UV spectroscopy. To do the final tune up the resist exposure rate C was scaled by the same factor N within the entire illumination range of 380-450 nm to match the experimental Dose-to-clear value E. Good agreement with experimental data was achieved on different device layers. Process window for the critical geometry was calculated based on the linewidth and sidewall angle specifications. Better understanding of the process allowed us to qualify new process into production in very short time frame and saved a lot of test wafers. Further process optimization is under way and efforts are being made to identify the optimum process for the future devices with smaller CDs.

A rigorous 3D nonplanar lithography simulator based on the integral equation approach to electromagnetic scattering is presented. The novelty of our approach lies in computing the scattering of each diffraction order separately during the initial setup phase of a simulation. Thereafter, the image intensity distributions for arbitrary mask geometries and defocus settings can be generated readily by appropriate superposition of the scattering results for the various diffraction orders. This capability allows one to simulate the effects of mask bias and defocus on a given BARC process efficiently.

The method of proximity photolithography is a practical and available way in the manufacture of gratin and radial encode. One of the most important factors of this way is lithographic gap. That is the distance from mask to surface of photoresist coated on ruled blank. The size of it affects the ruling quality directly, such as causing edge scattering. Because of the existing near-field Fresnel diffraction, it is impossible to obtain the ruling which is the same as the mask even if on the first focal plane of Fresnel. As it is very difficult to produce the exact parallel light in usual optical system, the actual image we get is not an ideal self-image. Therefore, a better position of the mask should be found in order to ensure the ruling quality. The relationship between image contrast and lithographic gap is deduced in the view of image contrast in this paper. According to the relation, rang of practical lithographic gap is obtained. Thus, a reliable basis is provided for selecting the best gap in actual photolithography.

We have developed two compact plasma focus devices operating in neon with high repetition rate capacity to be used as a repetitive pulse soft x-ray (SXR) source for lithography. A single capacitor module 1-1-1 was used to test high repetitive rate capability and was observed to produce soft x-rays in the wavelength range of 0.8-1.4 nm at up to 10 Hz. The discharge current rises in 1.2 us to peak value of 140 kA at 15 kV charge. The soft x-ray yield varies with the pressure of working gas, the value and polarity of voltage applied to capacitor.On the basis of this module we have designed a our module test system for SXR designated as the NX1. The peak discharge current is 270 kA when the capacitor bank is charged to 12kV. It produces 100J of soft x-ray per shot in single shot mode, in the wavelength range of 0.8 to 1.4nm and a spot size of below 1mm viewed end on. With a repetitive rate of up to 3Hz this gives 300W of average SXR power. The NX2 is a second system that has been designed and constructed. It will be operated at peak currents in excess of 300kA into water-cooled electrodes at repetitive rates up to 20Hz to produce 300W SXR in burst durations of up to 5 minutes. It is estimated that with such a SXR yield into a well designed beamline and a reasonably sensitive resist an exposure could be made in less than 10 seconds. Pushing such x-ray sources further to 2 kW output will make their intensity sufficient for SXR lithography with reasonably high throughput to be of industrial interest.

A 1.8kJ compact plasma focus source operated in neon is demonstrated as an x-ray source for microlithography in the wavelength range of 0.8-1.4 nm. Lithographs are obtained by exposing the resist to the x-ray point source with a mask in contact with the resist. The total energy emitted is measured using PIN diodes and photoconducting diamond detectors to be 15J per shot with a spectrum peaked at 1keV corresponding to the K shell lines from the neon working gas. The maximum repetition rate of 20 Hz allows lithographs to be obtained in less than 20 seconds when a reasonably sensitive resist is used.

LIGA and its defining process deep x-ray lithography, is an important method for machining high-aspect ratio microstructures, and a diverse range of applications are presently being investigated. One limitation of the technique is associated with the restriction on the 3D shape of the machined structures to essentially prismatic geometry. Further technical problems concerning the fabrication of a suitable mask for deep x-ray lithography are associated with the limited thickness of resist which can be patterned using electron beam lithography, and the undesirable exposure of resist by secondary radiations in an intervening x-ray lithography step which is used to produce a thicker mask. A deep lithography process using a focused beam of high energy light ions has the potential to overcome many of the geometrical restrictions inherent in deep x-ray lithography. An alternative use of deep ion bema lithography is to pattern a thick resist layer for the production of masks for deep x-ray lithography. This paper reports progress on the development of a system for deep ion bema lithography using a scanned 2.0 MeV proton beam of approximately 1 micron diameter. The result of computer simulations of the capabilities of deep ion beam lithography for the fabrication of thick DXL masks is presented.

A new process employing e-beam lithography and a self- aligned tow angle shadow evaporation has been developed to fabricate 10 nm tunnel junctions and split leads with gaps of 2-5 nm. The fabricated Al/Al_xO/Al tunnel junctions on a SiO₂/Si substrate had a capacitance of 20 aF. These tunnel junctions were incorporated in single electron tunneling circuits where the small capacitance is essential. Single electron tunneling transistors with threshold voltages of 3 mV were fabricated using this process. The object of closely spaced leads was to contact individual molecules for electrical characterizations. Further improvements of this process for a triple angle shadow evaporation will be discussed.

A self-aligning direct-write electron beam lithography instrument has been developed for fabricating Gallium Arsenide integrated circuits. The electron beam is used to directly write the critical layers in these circuits. The main application is to write the gate layer in high electron mobility transistors (HEMTs). A single HEMT may contain several gate electrodes, each of which is up to 150 micrometers wide, less than 0.25 micrometers long and which must be aligned with submicron accuracy. A variety of devices have been successfully written on the instrument, which comprises a scanning electron microscope (SEM) that has been interfaced to a purpose-built pattern generator and image correlation system. The standard SEM stage has been motorized and is used to position each device within the field of view of the SEM. The pattern generator then scans the electronic beam to obtain an image of the device. This image is correlated with a reference image and the precise location of the device is calculated and used for aligning the subsequent exposure. The active alignment system achieves excellent alignment, far exceeding the accuracy of the standard SEM stage. Not only does this obviate the need for expensive stage positioning systems, but it also compensates automatically for positional errors on the sample caused by mask tolerances. As the instrument uses the image of the device for correlation, no alignment marks are required on the sample. The system is fully automated and has been sued successfully to write a variety of device geometries.

We use the highly sensitive chemically amplified resist to obtain the high resolution and sensitivity in deep sub- micron region. We analyze the edge profiles and performances of resist by using the Electron-beam Lithography simulator (ELIS) and experiments. We mainly characterize the trend of resist profiles to measure the variation of wall angle, sensitivity, contrast, and solubility. In the simulation, development model for CAR is optimized to express the developed profiles of highly sensitive resist with high solubility and to have a good agreement with resist profiles in the electron beam lithography. From our results, we understand that resist edge profile depends on the solubility, sensitivity, and contrast of resist in the developer and got the high resolution to 0.15 micrometers line and space patterns using Leica EBMF 10.5 Gaussian beam. Finally, the ELIS simulator is useful in optimizing the deep sub- micron process.

An accurate method to measure beam current (BC) and beam diameter (BD) of an electron beam lithography by using a Faraday cup and a sharp edge is described. The sharp edge specimen was fabricated by an isotropic process in < 100 > silicon wafer which yielded a high etch rate ratio and gave exceptionally smooth etched faces. The saw-tooth of the edge was less than 30 nm. Detailed investigations about the measured BS and BD at various conditions showed that BC and the square of BD were linear with an offset, which was the sum of optical aberrations, noise, and edge width.

A 1.6kJ compact plasma focus source operated in neon at 5 Hz was demonstrated as an electron source for microlithography. LIthographs were obtained by exposing the resist (PMMA) to an electron beam emitted from the plasma focus through an extraction channel in its anode with a mask in contact with the resist. The total energy in the beam was estimated from the lithographs to be > 20mJ per shot with electron energy > 20kV, and > 1J with electron energy approximately 10keV. The electron beam from this plasma focus is able to expose greater than 1 cm² of resist placed 17cm from the source. Many samples with good resolution have ben obtained. An exposure can be mae on PMMA with only 10 shots over a period of 2 seconds. It is expected that with a higher sensitivity resist, an exposure can be made with a single shot.

During the implementation of organic bottom anti-reflective coating (BARC) for i-line 0.35 micrometers critical layer fabrication, footing was observed after the development of the photoresist due to the reduction of reflectivity by the organic BARC. Footing was undesirable since it created difficulties in the subsequent etching steps. Two methods were attempted to reduce the footings. One method was to increase the reflectivity of the substrates by changing the thickness of the organic BARC. Another method was to carry out a descrum process after the lithographic processes. The nominal thickness of organic BARC in the manufacturing process was 1520 angstrom with a reflectivity of less than 5 percent. However, by increasing the organic BARC thickness to 2000 angstrom and 2500 angstrom, the reflectivity of the polycide substrates were increased to 13 percent and 8 percent respectively. Experimental results showed that the increased reflectivity indeed helped to reduce the amount of footings. In the case of 2000 angstrom organic BARC, the footing was almost completely gone. Since these two different values of thickness were the local maximum and minimum on the thickness versus reflectivity curves, they provided relatively wide processing latitudes for manufacturing. For the descrum experiments to reduce the footings, the photoresist profiles were significantly thinned down laterally while the heights of the developed photoresist were only slightly affected. Unfortunately, the magnitudes of the footings remained unchanged. Therefore, the descrum process did not seem to help to resolve the footings remained unchanged. Therefore, the descrum process did not seem to help to resolve the footing problems in the implementation of organic BARC.

In the development of i-line 0.35 micrometers technology, the reflection from the poly-Si substrates become so severe that notching was observed in al the areas with larger than 2000 angstrom topological difference during the lithographical masking. As a result, microtrenches and poor electrical characteristics were obtained after etching. By applying 1520 angstrom of organic bottom anti-reflective coating, the reflection from the substrates was greatly reduced from 50 percent to less than 5 percent. Consequently, the design rules developed for i-line 0.35 micrometers technology could be preserved without microtrench formation. The organic BARC also provided additional advantages of planarizing the different topological features on the substrates. And, its etching rate was about the same as the photoresists. The exposure energy and usable depth of focus latitudes were slightly improved with the application of organic BARC. There were basically no differences in masking linearity and iso-dense bias when comparing the critical dimensions of the photoresists with or without applying the organic BARC. The experimental data agreed with the computer simulation data very well. Furthermore, good and were acceptable to the manufacturing environment. Defect density induced by the additional step of coating the organic BARC was very low. Therefore, the implementation of organic BARC was relatively simple and was essential to reduce the notching produced by substrate reflection in the critical layers of the 0.35 micrometers devices.

Realization of submicron features usually involves the use of sophisticated techniques like e-beam or x-ray lithography. A novel alternative technique of 'underetch and liftoff' has been developed using normal UV lithography in order to obtain submicron gap between metal lines. This technique is attractive since these small gaps can be realized irrespective of lithographic limitations. In this process, the first step involves the deposition of the first layer of metal. The next step is the coating of photoresist and opening windows. This is followed by etching of the first metal which results in an underetch. Subsequently the second metal layer is deposited. The final step is liftoff. As the photoresist is removed together with the second metal layer on top of it, it leaves behind a gap between the first and second metal layers equal to the amount of underetch while etching the first metal. Our experiments show that the underetch depends on the composition of the etchant, etching temperature, thickness of metal and time of etching. However, if etching is done for a sufficiently long time underetching stops. Hence, other factors have been standardized to obtain gaps of 0.5-0.7 micron for gold and aluminium metal lines. The small gaps between metal lines are useful in devices like charge coupled devices and metal insulator semiconductor tunnel transistors (MISTTs). MISTTs having high current gains have been successfully fabricated where the submicron emitter to collector separation was achieved using the above process. The technique where submicron gaps can be achieved using simple equipment, is expected to find a lot of use in semiconductor technology.

Continued demands on shrinking features with tighter tolerance on Critical Dimensions (CDs) and overlays are placing stringent requirements on parameters that are essentially the building blocks of the metrologies for CDs and overlays. This paper conducts a reality check on the precision and error budgets assigned to CD and overlay controls by the National Technology Roadmap for Semiconductors in light of constraints on parameters that are fundamental to the above measurements.

The focus window of various topographies and substrate was discussed in this paper. Also the electric test data and Cp yield with different focus will be introduced. Finally, the usable depth of focus and auto focus system will be applied to describe the difference between machine and process best focus.

LOCOS is the most widely used method for 0.35 micrometers process isolation. 2000 angstrom silicon nitride on 200 angstrom padoxide was selected as oxidation barrier before process optimization for the need of control the bird's beak and stress which affects the subsequent gate oxide quality. However, resist profile is prone to footing at this film stack. Severe footing could make minimum space CD too small, even not opened, to cause isolation failure. Experiment data shows that if nitride thickness varies from 1.9 K to 2.1 K, line CD variation can be up to 0.08 micrometers for a 0.6 micrometers line, which is about 80 percent of CD variation budget. Based on simulation results, 8 different nitride thickness in the range of 1750 angstrom to 2100 angstrom with step of 50 angstrom were deposited on 200 angstrom padoxide. Swing curve, CD versus nitride thickness for resist Emax and Emin, CD versus different exposure dose charts were obtained. Resist profile cross-sectional SEM pictures were also done to confirm simulation and in-line CD SEM measurement. An optimum combination of substrate film stack and resist thickness was selected. After implementation of this optimization, the sensitivity of CD to the nitride thickness was greatly reduced. Better resist profile and CD control were obtained. This was well confirmed by in-line monitoring data.

Decreasing dimensions in integrated circuits impose increasing demands in processing. Among requirements are reduced resistance in interconnects on high density chips and also low leakage currents. Transmission electron microscopy has been used to study the microstructures associated with salicide interconnects in wafers prepared on design rules between 0.6 to 0.35 microns. Irregularities such as varying gate width, interconnects in wafers prepared on design rules between 0.6 to 0.35 microns. Irregularities such as varying gate width, intergrowths of poly-silicon and polycrystallinity in titanium silicide were observed. Precipitation has not so far been noticed in pure or doped silica insulating layers.

A Ti-SALICIDE process incorporating an argon or nitrogen- amorphization implantation prior to silicidation to enhance the C54-TiSi₂ formation for deep submicron CMOS devices is presented. It was found that by incorporation a high- temperature titanium deposition at 400 degrees C together with argon-amorphization at a dosage of 3 X 10¹⁴ cm^-2, excellent sheet (rho) was obtained for gate lengths down to 0.25 micrometers . The improvement seen using a lower temperature deposition was relatively less. We postulate that the higher deposition temperature ensures that the C54 phase is nucleated before the C49 phase forms large grains. No noticeable difference was observed for dosages ranging between 3 X 10¹⁴ cm^-2 and 6 X 10¹⁴ cm^-2 for the argon implant. In the case for nitrogen-amorphization, the improvement seen on the narrow polySi gate was also promising. The impact of dopants on silicidation was evaluated nd discussed. Drawbacks of this technique appear to manifest in the compromised integrity of the source/drain junctions, and higher gate-to- source drain leakages, as evident in the case of argon and nitrogen amorphization implants. The anomalous leakage behavior observed for both argon and nitrogen was however not evident in the case of the arsenic implant. Comparable performance to the SALICIDE process with no pre- amorphization with respect to the leakage parameters was achieved for the arsenic-amorphized wafers.

In this study, a silicon oxy-nitride (SiOxNy) film deposited using the plasma enhanced chemical vapor deposition method has been developed and applied to improve poly-gate level resist line CD control. The desired optical properties of a SiOxNy anti-reflective coating (ARC) film and its optimum thickness were targeted by using a photolithography simulator. A process matrix study has led to the identification of an optimized SiOxNy film Dielectric ARC deposition process for i-line photolithography applications. Using the optimized SiOxNy film as the ARC, significant improvements, compared to the standard and top ARC techniques, have been achieved, including 5 times reduction in does to clear swing ratio and complete elimination of reflection induced photoresist notching and necking effects. Moreover, a 2500 wafer marathon run demonstrated that the refractive index, extinction coefficient and thickness of this film can be controlled to +/- 0.04, +/- 0.03 and +/- 12A, respectively and that the particle performance is excellent.

The gains are pointed out of the potential replacement of the usual patterned transmission x-ray mask, in consideration of high-resolution proximity lithography for VLSI, by a diffraction element, or bilevel in-line hologram, to be projected under near-field conditions using synchrotron radiation. The hologram can be configured to correct for diffraction blurring due to projection, and be designed for pre-determined gaps between mask and wafer. The adjustment of experimental parameters can account for the waveguide effects that arise from mask elements with small features which are several hundred x-ray wavelengths thick.It is shown that the hologram, for projection printing at the 50nm feature size, at mask to wafer gaps of 10micrometers or greater, can be fabricated in a similar fashion to a high-resolution mask. The calculation of the hologram is computationally intensive, but a database of calculated features is envisaged.

Common uses of the terms 'resolution' and 'depth of focus' (DOF) are explored as they relate to semiconductor lithography. A definition of DOF is given which is most appropriate to photolithography for IC manufacturing. Examples of the use of the definition for DOF for studying trends in lithography are given. Resolution is then defined based on realistic requirements for semiconductor manufacturing. Using this definition of resolution, the common scaling law of resolution with numerical aperture is shown to be inaccurate under typical conditions.