18 August 1997 Electrical performance analysis of IC package for the high-end memory device
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Proceedings Volume 3184, Microelectronic Packaging and Laser Processing; (1997) https://doi.org/10.1117/12.280558
Event: ISMA '97 International Symposium on Microelectronics and Assembly, 1997, Singapore, Singapore
Abstract
The developments of processing technology and design make it possible to increase the clock speed and the number of input outputs (I/Os) in memory devices. The interconnections of IC package are considered as an important factor to decide the performance of the memory devices. In order to overcome the limitations of the conventional package, new types of package such as Ball Grid Array (BGA), chip scale package or flip chip bonding are adopted by many IC manufacturers. The present work has compared the electrical performances of 3 different packages to provide deign guide for IC packages of the high performance memory devices in the future. Those packages are designed for the same memory devices to confront to the diversity of memory market demand. The conventional package using lead frame, wire bonded BGA using printed circuit board substrate and flip chip bonded BGA are analyzed. Their electrical performances are compared in the area of signal delay and coupling effect between signal interconnections. The electrical package modeling is built by extracting parasitic of interconnections in IC package through electro-magnetic simulations. The electrical package modeling is built by extracting parasitic of interconnections in IC package through electro-magnetic simulations. The analysis of electrical behavior is performed using SPICE model which is made to represent the real situation. The methodology presented is also capable of determining the most suitable memory package for a particular device based on the electrical performance.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Dong Ho Lee, Dong Ho Lee, Chan Min Han, Chan Min Han, } "Electrical performance analysis of IC package for the high-end memory device", Proc. SPIE 3184, Microelectronic Packaging and Laser Processing, (18 August 1997); doi: 10.1117/12.280558; https://doi.org/10.1117/12.280558
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