Paper
4 August 1982 VHSIC Vector Arithmetic Logic Unit (ALU) As An Image Processing Element
Jeffrey Gruger
Author Affiliations +
Abstract
The VHSIC Vector Arithmetic Logic Unit (VALU) is a particularly powerful computational resource which has been optimized for signal and image processing. The device features a sixteen bit parallel multiplier, a sixteen bit full capability ALU, a thirty-six bit adder/subtractor, sixteen words of multi-port register file, and a user specified 96K Read Only Memory for storage of sixty-two bit microinstructions. The versatility of the VALU architecture and its associated support devices permit the construction of various image processing configurations including: single VALU array processors, arrays of array processors, and systolic array structures for extremely high speed image processing requirements. The different image processor architectural configurations are reviewed and examples of specific algorithm executions are given to demonstrate the applicability of each approach when related to algorithm partitioning, throughput requirements, flexibility requirements, size requirements, and power requirements.
© (1982) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jeffrey Gruger "VHSIC Vector Arithmetic Logic Unit (ALU) As An Image Processing Element", Proc. SPIE 0319, Very High Speed Integrated Circuit Technology for Electro-Optic Applications, (4 August 1982); https://doi.org/10.1117/12.933169
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KEYWORDS
Image processing

Array processing

Data processing

Finite impulse response filters

Target detection

Image filtering

Computer arithmetic

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