High speed optical communications systems are evolving rapidly. Commercial systems achieve high aggregate data rates utilizing wavelength division multiplexing, where multiple wavelength channels carry information at electronic rates, typically 2.5 Gb/s. Data encryption in these systems will most likely be implemented electronically. However, future system may also utilize time division multiple access (TDMA) schemes and technologies for 100 Gb/s, single stream TDMA networks are currently being developed. These high speed TDMA networks will rely on all-optical switches and processors to interface the high-speed electronics in the users nodes to the ultra-high-speed optical data bus. Data encryption in these networks may need to be implemented using optical logic gates. Straightforward duplication of electronic encryption circuits using optical logic gates is not feasible because optical logic gates have low fan-out, require high optical powers, are difficult to synchronize and have high latency. In this paper, we propose a high- speed electro-optic scheme for reconfigurable feedback shift registers (RFSRs) that relies upon electronic encryption circuits to reconfigure a sequence of optical logic gates and which makes use of the latency in the optical gates as memory. We show that, for linear RFSRs, the low number of optical gates is not a drawback and that the period of the sequences is generally very large. Non-linear feedforward functions, such as all-optical bit swapping, many also be introduced to improve the pseudo-random properties of the sequences.