12 February 1997 Attenuated phase-shift masks reducing side-lobe effect in DRAM peripheral circuit region
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Abstract
We applied deep UV attenuated phase shift masks (PSMs) to the quarter micron level contact hole pattern layer of a DRAM. There were two different hole sizes: 0.26 micrometer hole in the memory cell region, and 0.35 micrometer in the peripheral circuit region. We examined two methods to reduce the side lobe effects in the peripheral circuit region. The first method was a chrome (Cr) shield method: the peripheral circuit region was covered by Cr. The second method was a mask bias method: large mask bias was added to contact hole patterns in memory cells. Both methods sufficiently reduced the side lobe effect in the peripheral circuit region.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Haruo Iwasaki, Keiichi Hoshi, Hiroyoshi Tanabe, Kunihiko Kasama, "Attenuated phase-shift masks reducing side-lobe effect in DRAM peripheral circuit region", Proc. SPIE 3236, 17th Annual BACUS Symposium on Photomask Technology and Management, (12 February 1997); doi: 10.1117/12.301229; https://doi.org/10.1117/12.301229
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