8 June 1998 Automated defect inspection: past, present, and future
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As minimum feature sizes on semiconductor devices shrink to 0.1 microns, integrated circuit manufacturers face an increasing challenge to maintain and increase wafer yields and chip performance. Few issues in semiconductor processing exert such strong leverage over manufacturing as defects (which affect product yield, manufacturability and reliability). The challenge for current and future inspection methods is to shorten the time to identify the causes of yield loss. The techniques and equipment needed to accomplish this result can be found through an analysis of past and current inspection techniques combined with predicted future requirements for inspection and yield analysis systems. From the first automatic mask defect detection systems built at Bell Labs to an analysis of requirements for future inspection and yield analysis systems, this paper will provide a historical perspective, analysis of inspection methodologies and predictions for future requirements.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Paul Sandland, "Automated defect inspection: past, present, and future", Proc. SPIE 3332, Metrology, Inspection, and Process Control for Microlithography XII, (8 June 1998); doi: 10.1117/12.308738; https://doi.org/10.1117/12.308738

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