Tailoring of isolation structures with top-surface imaging process by silylation

Hyoung-Gi Kim; Myoung-Soo Kim; Cheol-Kyu Bok; Byung-Jun Park; Jin-Woong Kim; Ki-Ho Baik; Dai-Hoon Lee

doi:10.1117/12.312458

29 June 1998 Tailoring of isolation structures with top-surface imaging process by silylation

Hyoung-Gi Kim, Myoung-Soo Kim, Cheol-Kyu Bok, Byung-Jun Park, Jin-Woong Kim, Ki-Ho Baik, Dai-Hoon Lee

Proceedings Volume 3333, Advances in Resist Technology and Processing XV; (1998) https://doi.org/10.1117/12.312458
Event: 23rd Annual International Symposium on Microlithography, 1998, Santa Clara, CA, United States

Abstract

It is well known that TIPS (Top-surface Imaging Process by Silylation) process has a feasibility to overcome lots of problems induced from single-layer resist process. Nevertheless, chip makers have been reluctant to apply this process to giga technology with two major issues; process issues such as Line Edge Roughness (LER), residues, Critical Dimension (CD) uniformity, and rework scheme and infrastructure issues of system reliability and reproducibility. First of all, the process issues should be investigated to realize the giga device manufacturing. In this paper, we will describe the patterning results of 180 nm isolation structure of 1G bit DRAM on process issues. LER is a critical problem that arises from edge breakdown of thin SiOx mask generated from silylated resist during dry development. We have tried to get roughness smaller by means of the prevention of edge-breakdown of SiOx matrix. Residues on the unexposed area due to unwanted silylation after dry development disappeared by using an optimized C₂F₆/O₂ break-through step. In this experimental, the optimum process conditions for removing of LER and residues were determined by controlling the condition of dry development. The results are compared to those obtained using two-step and three-step dry development. We achieved excellent 3 sigma values of 17 nm and 20 nm for CD uniformity within a chip and a wafer, respectively. We have also developed rework procedures to remove the resist pattern formed after dry development by using BOE and clean- D (mixture of H₂SO₄ and H₂O₂) solutions. From these studies, it was confirmed that TIPS process using a cluster-tool silylation system incorporating a LRC TCP^TM 9400SE dry development module was verified as a production-worthy process for 180 nm isolation pattern formation.

Citation Download Citation

Hyoung-Gi Kim, Myoung-Soo Kim, Cheol-Kyu Bok, Byung-Jun Park, Jin-Woong Kim, Ki-Ho Baik, and Dai-Hoon Lee "Tailoring of isolation structures with top-surface imaging process by silylation", Proc. SPIE 3333, Advances in Resist Technology and Processing XV, (29 June 1998); https://doi.org/10.1117/12.312458

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