OPC (Optimized Process Correction) Technology is an approach for improving lithographic performance that has received much attention recently. The core of OPC technology is the modification of IC pattern layouts to compensate or 'correct' for IC manufacturing process distortions. This presentation summarizes the results of the SEMATECH project in OPC Validation, designated as project J111. The goal of the project was to examine the present status of OPC technology, to determine some measure of the efficacy of OPC technology, and determine which components (if any) require additional development to be suitable for manufacturing. To this end, an elaborate set of test patterns was created and provided to several commercially viable OPC suppliers. These suppliers converted these using their OPC software for 6 degrees of OPC 'aggressiveness' and returned the converted files to SEMATECH. A jobdeck containing all the converted patterns were created, and reticles were fabricated from this jobdeck using 6 different maskmaking processes. Each reticle was then exposed onto standard wafers using plan-of record processes at SEMATECH member companies. The efficacy of the various OPC approaches was then determined by measuring and comparing the patterns produced on these wafers after processing and etching. This protocol was followed for both an I-line process and a DUV process. Significant improvements in lithographic performance were observed in many cases, for both I-line and DUV processes. In the best cases, the data suggested that OPC can improve lithographic performance by 1/2 a generation. The degree of success, however, depended heavily on the choice of maskmaking technique and OPC software supplier, with some combinations significantly better at addressing 1-D bias problems, while others made dramatic improvements for 1.5-D or 2-D problems.