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12 August 1998 Reconfigurable hardware mapping for accelerometer-based navigation applications
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Abstract
Recent advances in reconfigurable logic have enabled physical hardware to be reused for different application and sensor types. This hardware reuse" provides a significant cost reduction since a single hardware design can be reused and adapted to many other applications with a simple change in software" (FPGA configuration information). Present navigation systems consist of a central processor providing the algorithmic computations and application specific integrated circuits (ASIC) converting the sensor data to a useable computational format. Using reconfigurable logic allows the signal processing for each sensor to be performed in parallel and the design can be revised as needed without fabricating a new ASIC. Development of our system presently uses only accelerometer data in order to study reconfiguration aspects in detail without adding complications due to the presence of other types of sensors. For an accelerometer-only navigation system, the navigation is most easily implemented in two dimensions. A design for an interferometric and an intensity-based MEMS (Microelectromechanical Machined Sensor) accelerometer are described and compared to a capacitance-based MEMS accelerometer implementation . Plans for final implementation on a monolithic ceramic substrate which will incorporate both optical or capacitance-based sensors and reconfigurable hardware as a complete system are also described. Keywords: Reconfigurable Processing, Sensor Signal Processing, Navigation, Accelerometer
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jeanette F. Arrigo, Paul M. Anderson, Paul M. Chau, Yi-Hsing Chen, and Norman C. Tien "Reconfigurable hardware mapping for accelerometer-based navigation applications", Proc. SPIE 3366, Robotic and Semi-Robotic Ground Vehicle Technology, (12 August 1998); https://doi.org/10.1117/12.317557
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