Paper
7 September 1998 Motion vector estimation on focal sensor plane by block matching
Zheng Li, Kiyoharu Aizawa, Mitsutoshi Hatori
Author Affiliations +
Proceedings Volume 3410, Advanced Focal Plane Arrays and Electronic Cameras II; (1998) https://doi.org/10.1117/12.324002
Event: SYBEN-Broadband European Networks and Electronic Image Capture and Publishing, 1998, Zurich, Switzerland
Abstract
In this paper, a fast-2D motion vector estimation on the CMOS sensor focal plane is proposed. Edge detection circuit composed of 2 crossed differential OTAs with Time- Multiplexed sampling is adopted for getting horizontal and vertical edges. Short-time digital memory is designed by transmission gate array, which can keep edge information by a smaller layout area. High speed block matching is designed by a Local Parallel and Global Column Parallel processing structure, which fully makes use of the parallel nature of image signals. The size of block matching can be reduced to 4 by 4 pixels and a search area of +/- 1 pixel around the intentional block at a high frame rate of 1000 frame/s. The prototype chip is designed by 1-poly 2-metal 0.7 micrometers CMOS process.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Zheng Li, Kiyoharu Aizawa, and Mitsutoshi Hatori "Motion vector estimation on focal sensor plane by block matching", Proc. SPIE 3410, Advanced Focal Plane Arrays and Electronic Cameras II, (7 September 1998); https://doi.org/10.1117/12.324002
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CITATIONS
Cited by 6 scholarly publications.
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KEYWORDS
Edge detection

Motion estimation

Sensors

Logic

Multiplexing

CMOS sensors

Prototyping

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