4 September 1998 Advanced gate technology for sub-0.25-μm CMOSFETs
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Abstract
As COOS technology is scaled into the sub-0.25 micrometer regime, the poly-Si gate depletion effect becomes more problematic. This paper discusses various technological approaches to eliminating this effect. It is shown that poly- SiGe is an especially promising alternative gate material because it can be integrated into an existing COOS process with relative ease. As compared to poly-Si gate technology, poly-Si0.8Ge0.2 gate technology provides improved resistance to the gate-depletion effect, improved tradeoff between the gate-depletion effect and the boron penetration problem for p-channel devices, and superior device reliability. The viability of poly-Si0.8Ge0.2 as a gate material for sub-0.25 micrometer COOS technology is demonstrated in the fabrication of 0.1 micrometer channel- length MOSFETs.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tsu-Jae King, Tsu-Jae King, } "Advanced gate technology for sub-0.25-μm CMOSFETs", Proc. SPIE 3506, Microelectronic Device Technology II, (4 September 1998); doi: 10.1117/12.323966; https://doi.org/10.1117/12.323966
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