4 September 1998 Feasibility study to determine the suitability of using TiN/W and Si1-xGex as alternative gate materials for sub-0.1-μm gate-length PMOS devices
Author Affiliations +
Abstract
In this paper we report on a simulation study on the impact of gate material on PMOS device performance. The gate materials studied were conventional poly-silicon gate, SiGe gate with varying Ge composition,and TiN/W metal gate. The motivation for alternative gate materials is to progressively alleviate or eliminate the poly depletion problem as observed with existing poly-silicon gate material, which becomes increasingly more important as the gate oxide becomes ultra thin (less than or equal to 26 Angstrom). Using these alternative gate materials, drive currents can be higher than those with conventional poly-silicon gate material, especially for PMOS devices where gate depletion is more pronounced. Two types of PMOS device designs were studied: (1) a high- performance design which is characterized by a maximum off current of 1nA/micrometer, and (2) a low-power design characterized by a maximum off current of 10 pA/micrometer. A plus or minus 10% variation in gate length is allowed for the high-performance design, and a larger variation for the low- power design. The minimum allowed gate length is 0.09 micrometer in both cases. Key results obtained from this study are as follows. First, use of TiN gate material results in a 30% improvement in pMOS nominal drive current compared to conventional poly-Si gate pMOS devices for the low-power device design, and a 15% pMOS nominal drive current improvement for the high-performance device design. Second, use of SiGe gate material results in a 25% improvement in nominal pMOS drive current compared to conventional poly-Si gate pMOS for the low-power device design, and a 13% pMOS nominal drive current improvement for the high-performance device design.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Suhail S. Murtaza, Suhail S. Murtaza, Jerry C. Hu, Jerry C. Hu, Sreenath Unnikrishnan, Sreenath Unnikrishnan, Mark Rodder, Mark Rodder, Ih-Chin Chen, Ih-Chin Chen, } "Feasibility study to determine the suitability of using TiN/W and Si1-xGex as alternative gate materials for sub-0.1-μm gate-length PMOS devices", Proc. SPIE 3506, Microelectronic Device Technology II, (4 September 1998); doi: 10.1117/12.323981; https://doi.org/10.1117/12.323981
PROCEEDINGS
7 PAGES


SHARE
Back to Top