Abstract models of reconfigurable architectures for synthesis and compilation

Ranga Vemuri; Jeff Walrath

doi:10.1117/12.327030

8 October 1998 Abstract models of reconfigurable architectures for synthesis and compilation

Ranga Vemuri, Jeff Walrath

Proceedings Volume 3526, Configurable Computing: Technology and Applications; (1998) https://doi.org/10.1117/12.327030
Event: Photonics East (ISAM, VVDC, IEMB), 1998, Boston, MA, United States

Abstract

We propose a methodology for specifying abstract models of reconfigurable architectures. These models may be used by compilers, synthesis systems and other design agents to evaluate the correctness and performance of postulated reconfiguration schedules. We show how the proposed methodology can be used to model reconfigurable computation, interconnect, memory and I/O elements interacting with each other using various protocols. We illustrate the modeling approach through small case studies. The proposed methodology is embedded in a modeling language called PDL+ and its support environment called ARC.

Citation Download Citation

Ranga Vemuri and Jeff Walrath "Abstract models of reconfigurable architectures for synthesis and compilation", Proc. SPIE 3526, Configurable Computing: Technology and Applications, (8 October 1998); https://doi.org/10.1117/12.327030

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