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18 December 1998 Full-chip optical proximity correction using lithography simulation
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Abstract
The application of Optical Proximity Correction for improving uniformity of printed dimensions at sub-half-micron resolution in a 0.35 micron CMOS process is described. Results are presented in terms of measurements made on polysilicon gates, at different pitches, which are compared to the uncorrected case. The impact of photomask and stepper lens qualities on dimensional control are also considered. Results presented are at the demonstrator stage but strategy for implementation in production is discussed.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Graham G. Arthur, Brian Martin, Christine Wallace, Anja Rosenbusch, and Huw Fryer "Full-chip optical proximity correction using lithography simulation", Proc. SPIE 3546, 18th Annual BACUS Symposium on Photomask Technology and Management, (18 December 1998); https://doi.org/10.1117/12.332847
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