11 August 1998 Compatability of P+-GexSi1-x/p-Si heterojunction internal photoemission infrared detector with its monolithically integrated MOS readout switch
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Abstract
In this paper, the compatibility of P+-GexSi1-x/p-Si heterojunction internal photoemission IR detector (HIP IRD) with its CMOS readout circuit is analyzed with a feasible approach presented. The experimental chip in which P+-GexSi1-x/p-Si HIP IRD and its NMOS readout switch are monolithically integrated has been fabricated with a 3 micrometers NMOS technology. The MBE grown detector without the dielectric cavity and anti-reflecting layer has a blackbody detectivity D*(500, 1000, 1) of 1.1 X 109cmHz1/2/W at the temperature of 77K. The selective readout of the output signals of the detectors through the NMOS readout switch at 77K has been achieved. Therefore, the feasibility of fabricating monolithically integrated P+-GexSi1-x/p-Si HIP IR focal plane array with NMOS readout circuit was demonstrated preliminarily.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ruizhong Wang, Ruizhong Wang, Peiyi Chen, Peiyi Chen, Peihsin Tsien, Peihsin Tsien, Yongkang Li, Yongkang Li, Junming Zhou, Junming Zhou, } "Compatability of P+-GexSi1-x/p-Si heterojunction internal photoemission infrared detector with its monolithically integrated MOS readout switch", Proc. SPIE 3553, Detectors, Focal Plane Arrays, and Imaging Devices II, (11 August 1998); doi: 10.1117/12.318064; https://doi.org/10.1117/12.318064
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