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27 April 1999 Design, fabrication, and characterization of a family of active pixel CID imagers
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A new type of sensor has been developed for applications in high radiation environments such as space. In this paper we present the pixel structure, fabrication cycle and measured performance of a family of active pixel charge injection devices designed in PMOS and respectively CMOS technology. A simple 8 by 8 prototype was developed in 1996. This was followed by a 40 by 54 array having 90 micrometers pixel size. This device has address decoders integrated on chip and, a transfer gate included in each pixel in order to eliminate feed-through noise. These circuits were fabricated at RIT using a 6 micrometers PMOS double polysilicon technology. A third 128 by 128 array having 41 micrometers pixel size has been designed and manufactured at a commercial foundry using 2 micrometers CMOS technology. The on-chip decoders allow resetting of selective regions of the chip.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
George Lungu, Gerrit Lubberts, Zoran Ninkov, Dan Ma, Lynn F. Fuller, Joseph Carbone, Zulfiquar Alam, and Claudia Borman "Design, fabrication, and characterization of a family of active pixel CID imagers", Proc. SPIE 3649, Sensors, Cameras, and Systems for Scientific/Industrial Applications, (27 April 1999);


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