Hardware/software design implementation of feature detection for a reconfigurable processor

Philip P. Dang; Paul M. Chau

doi:10.1117/12.334727

28 December 1998 Hardware/software design implementation of feature detection for a reconfigurable processor

Philip P. Dang, Paul M. Chau

Proceedings Volume 3653, Visual Communications and Image Processing '99; (1998) https://doi.org/10.1117/12.334727
Event: Electronic Imaging '99, 1999, San Jose, CA, United States

Abstract

Image processing algorithms are suitable for reconfigurable architectures due to their matrix structures, inherent parallelism and need for flexibility and processing speed. This paper describes a method to implement feature detection on the ReConfigurable Processor (RCP). The RCP is an FPGA- based system, which was built by the VLSI-RCP Research Group at UCSD and L3 Communications. The design is based on the Altera FLEX 10K70. The architecture used to implement feature detector on RCP, software and hardware implementation will be discussed.

Citation Download Citation

Philip P. Dang and Paul M. Chau "Hardware/software design implementation of feature detection for a reconfigurable processor", Proc. SPIE 3653, Visual Communications and Image Processing '99, (28 December 1998); https://doi.org/10.1117/12.334727

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available