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28 December 1998 Hardware/software design implementation of feature detection for a reconfigurable processor
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Proceedings Volume 3653, Visual Communications and Image Processing '99; (1998) https://doi.org/10.1117/12.334727
Event: Electronic Imaging '99, 1999, San Jose, CA, United States
Abstract
Image processing algorithms are suitable for reconfigurable architectures due to their matrix structures, inherent parallelism and need for flexibility and processing speed. This paper describes a method to implement feature detection on the ReConfigurable Processor (RCP). The RCP is an FPGA- based system, which was built by the VLSI-RCP Research Group at UCSD and L3 Communications. The design is based on the Altera FLEX 10K70. The architecture used to implement feature detector on RCP, software and hardware implementation will be discussed.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Philip P. Dang and Paul M. Chau "Hardware/software design implementation of feature detection for a reconfigurable processor", Proc. SPIE 3653, Visual Communications and Image Processing '99, (28 December 1998); https://doi.org/10.1117/12.334727
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