21 December 1998 Media processing with field-programmable gate arrays on a microprocessor's local bus
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Abstract
The Chidi system is a PCI-bus media processor card which performs its processing tasks on a large field-programmable gate array (Altera 10K100) in conjunction with a general purpose CPU (PowerPC 604e). Special address-generation and buffering logic (also implemented on FPGAs) allows the reconfigurable processor to share a local bus with the CPU, turning burst accesses to memory into continuous streams and converting between the memory's 64-bit words and the media data types. In this paper we present the design requirements for the Chidi system, describe the hardware architecture, and discuss the software model for its use in media processing.
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V. Michael Bove, V. Michael Bove, Mark Lee, Mark Lee, Yuan-Min Liu, Yuan-Min Liu, Christopher McEniry, Christopher McEniry, Thomas A. Nwodoh, Thomas A. Nwodoh, John A. Watlington, John A. Watlington, } "Media processing with field-programmable gate arrays on a microprocessor's local bus", Proc. SPIE 3655, Media Processors 1999, (21 December 1998); doi: 10.1117/12.334768; https://doi.org/10.1117/12.334768
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