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14 June 1999 Optimization of advanced design rule processes utilizing postdevelop patterned-wafer inspection
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The fast advance in small design rule processes has necessitated the ability to quickly identify defect sources and eliminate the causes. The development cycle can be shortened if defect sources are identified prior to key processing steps such as metal and contact etch. In addition, valuable products can be saved because the inspection is done at a reworkable step. This paper presents results for advanced process development which addresses the issues of throughput and defect identification. A methodology was established for defect monitoring and defect reduction at the after-develop step which allows for optimization of an advanced lithographic process. The WF- 736Duo wafer inspection system with real-time defect classification was used to perform post-development inspection studies. The primary conclusions were than (1) manual post-development inspection is inadequate, (2) the WF-736Duo patterned wafer inspection system could capture most defect types with high throughput, and (3) the methodology based on automated defect capture provided enhanced defect reduction capability. The defects identified included both macro- and micro-defects. Examples of defects detected included standard lithography defects as well as defects associated with the advanced process development. The turn-around-time of process development was improved with the defect capture and classification from the inspection at the photo-lithographic step.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Andrew Skumanich, John Boyle, Gary Snyder, and Xiaoming Yin "Optimization of advanced design rule processes utilizing postdevelop patterned-wafer inspection", Proc. SPIE 3677, Metrology, Inspection, and Process Control for Microlithography XIII, (14 June 1999);

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