14 June 1999 Parameter extraction framework for DUV lithography simulation
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Abstract
As the semiconductor industry moves into the deep submicron range, the costs associated with wafer processing are increasing rapidly. This calls for improved simulation capabilities that provide information for meaningful 'what if' analysis. This work proposes a common methodology for extracting information from FTIR, dissolution rate monitor and ellipsometry measurements, to be ultimately used for the calibration of commercial lithography simulation tools. Using global optimization techniques, this approach uses cross-section CD data available in fabs to tune the simulation engine, thus giving it the predictive capabilities that could potentially improve yield ramp rates and hence reduce development costs. Results of this framework for a commercial Shipley resist are presented.
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Nickhil H. Jakatdar, Junwei Bao, Costas J. Spanos, Xinhui Niu, Joseph J. Bendik, Stephen L. Hill, "Parameter extraction framework for DUV lithography simulation", Proc. SPIE 3677, Metrology, Inspection, and Process Control for Microlithography XIII, (14 June 1999); doi: 10.1117/12.350831; https://doi.org/10.1117/12.350831
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