IRST system: hardware implementation issues

Suyog D. Deshpande; Philip Chan; W. Ser; Ronda Venkateswarlu

doi:10.1117/12.352967

12 July 1999 IRST system: hardware implementation issues

Suyog D. Deshpande, Philip Chan, W. Ser, Ronda Venkateswarlu

Proceedings Volume 3701, Infrared Imaging Systems: Design, Analysis, Modeling, and Testing X; (1999) https://doi.org/10.1117/12.352967
Event: AeroSense '99, 1999, Orlando, FL, United States

Abstract

Generally, Infrared Search and Track systems use linear focal-plane-arrays with time-delay and integration, because of their high sensitivity. However, the readout is a cumbersome process and needs special effort. This paper describes signal processing and hardware (HW) implementation issues related to front-end electronics, non-uniformity compensation, signal formatting, target detection, tracking and display system. This paper proposes parallel pipeline architecture with dedicated HW for computationally intensive algorithms and SW intensive DSP HW for reconfigurable architecture.

Citation Download Citation

Suyog D. Deshpande, Philip Chan, W. Ser, and Ronda Venkateswarlu "IRST system: hardware implementation issues", Proc. SPIE 3701, Infrared Imaging Systems: Design, Analysis, Modeling, and Testing X, (12 July 1999); https://doi.org/10.1117/12.352967

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