Leading-edge technologies require continually shrinking design grids due to the industry demands for decreasing minimum feature size and higher resolution. Using conventional raster-scanned exposure tools to place these patterns on photomasks results in longer writing times, because linear decreases in address result in exponential increases in writing time. This phenomenon can be compensated throughput at small addresses while retaining lithographic quality.
Charles A. Sauer,
"Use of a MEBES tool to manufacture 180-nm reticles", Proc. SPIE 3741, Lithography for Semiconductor Manufacturing, (28 April 1999); doi: 10.1117/12.346884; https://doi.org/10.1117/12.346884