In semiconductor manufacturing there is a great demand for innovations towards higher cost-effectiveness. The increasing employment of advanced control systems for process and equipment control is one means to improve manufacturing processes effectively and, hence, to lower costs. A precondition for an accurate and fast control is the availability of process models. In this paper neural networks are applied to non-linear system identification as an alternative or addition to physical models. Neural empirical models are developed with the help of measured input and output data of a system or process. After a brief summary of the theory of neural networks their application to system identification is described in detail. The capabilities of the neural network models are demonstrated by several examples. The temperature dynamics of a vertical furnace for the oxidation of 300 mm wafers as well as the zone temperatures of a 150 mm LPCVD furnace are simulated and the results are verified by measurements. Moreover, in order to control wafer temperatures in batch furnaces, an appropriate model was developed and implemented in a model- based controller.

Thermal oxidation rates of silicon are known to be a function of time, temperature and gas flows. Recent work has focused on pressure as a variable in the process. While attention has been placed on pressure equalization between the process gases and the exhaust, this paper demonstrates that this level of control is insufficient, since the absolute pressure also plays a contributory part. This is amply demonstrated by the relationship of atmospheric pressure to the rate of oxidation. Silicon oxidation processes at high altitude locations grow less oxide than those at sea level. The variability of the prevailing atmospheric conditions then has a direct impact on the resultant oxidation thickness--which is why so often the oxidation time is adjusted on a daily rate. A system is presented that control absolute pressure in the furnace irrespective of changes in the local ambient pressure.

The process control of lightly doping polysilicon with Phosphine can be difficult. In high volume semiconductor manufacturing the equipment downtime and poor process performance associated with this type of process is expensive. Utilizing the volume fraction of the polysilicon test wafers, as measured on an ellipsometer, as input prior to dope, improvements to process performance and control as well as equipment downtime can be achieved.

One of the main struggles in CMP engineering has been how to implement a process control methodology and still have a manufacturable and/or cost-effective process flow. The need for insitu rate monitor (ISRM) control has been well recognized. Variations associated with device/product types, incoming films, consumables and equipment must be accounted for in the setup ofthe CMP process. However, the common engineering practice has been to average the response through the use of batch processing. Batch processing in CMP requires frequent off-line wafer measurements or the acceptance of lower process yield. Both consequences are unacceptable for wafer costs in today's marketplace. Whereas, with the use of endpoint technology in CMP, engineering can provide a customized process for each wafer. This paper will present the characterization, development and implementation of ISRM control of dielectric CMP in an ASIC manufacturing environment. The details concerning the setup of optical interferometry and multi-platen CMP monitoring will be described. Pattern density differences, time to planarization, changes in polish rates and or uniformities, incoming film differences, consumable variations and equipment drift will be visualized by ISRM. And, finally, the impact of ISRM on manufacturability, process yield and probe yield will be quantified.

In the modern VLSI manufacture, the quality of the silicon raw wafer can not be over-emphasized in multilevel integration circuit manufacture. The silicon raw wafers induced low yield issue including particles, contamination residue and IDDQ failure are found in production lots. All these low yield issues are caused by the worse raw wafer vendor hard laser mark. The raw wafer vendor hard laser mark done by the raw wafer supplier on the wafer shows the ingot batch, the substrate type and the supplier company. When the silicon raw wafers are processed in production from wafer start, the worse vendor laser mark will induced some contamination from different process stage and be resulted in low yield issue. After improving the vendor laser mark process in laser mark procedure as well as method, all the low yield issues were recovered.

ProcessWORKS, a factory-level run-to-run control architecture, originally developed at Texas Instruments and now a product of Adventa Control Technologies, can treat complex control problems in an automated, predictable, and repeatable fashion. ProcessWORKS is compatible with different techniques for data acquisition and analysis, model adjustment and feedback, and model optimization. ProcessWORKS is also designed to deal with practical implementation issues in the fab. In this talk we will review the benefits of ProcessWORKS run-to-run control. We will discuss some practical problems in the deployment of run-to-run control in the fab, and we will show how ProcessWORKS deals with these issues. Examples from the deployment of ProcessWORKS at Texas Instruments on state of the art semiconductor technologies will be given.

Recently, statistical process control methodologies have been developed to accommodate autocorrelated data. A primary method to deal with autocorrelated data is the use of residual charts. Although this methodology has the advantage that it can be applied to any autocorrelated data, it needs modeling effort in practice. In addition, the detection capabilities of the residual chart is not always great. Zhang proposed the EWMAST chart, which is constructed by charting the EWMA statistic for stationary processes to monitor the process mean. The performance among the EWMAST chart, the X chart, the residual X chart and other charts were compared in Zhang. In this article, I will compare the EWMAST chart with the residual CUSUM chart and residual EWMA chart as well as the residual X chart and X chart via the average run length.

We designed an adaptive line width controller specially tailored to the needs of a highly diversified logic fab. Simulations of different controller types fed with historic CD data show advantages of an SPC based controller over a Run by Run controller. This result confirms the SPC assumption that as long as a process is in statistical control, changing the process parameters will only increase the variability of the output.

This paper compares the performance of quadratic and covariance models for a RESURF device. TCAD is used in conjunction with a CCI design and both response surfaces and response variances are compared for both models. Experimentally measured distributions are compared with those predicted by TCAD and the differences used to help identify other possible sources of variation.

In this paper, we demonstrate a rigorous and planned design of experiment (DOE) approach to process development with an aim to providing a fully characterized and manufacturable process in a single cycle of silicon. The key to this approach is to examine design rule, design practice and physical attributes and their interactions with the same methodology to ensure that product requirements and variations are fully manufacturable. As a case study, we describe the development and analysis of a Schottky device suite for an analog bipolar technology. We discuss the detailed pre-processing preparation, which has a strong Technology Computer Aided Design element, resulting in a coordinated DOE mask set and experimental DOE plan. We then discuss examples of analyzed data looking at the individual and combined attributes of design rules, design practices and manufacturing sensitivities. We also describe the way in which the methodology is flexible enough to encourage and enable the development of novel devices (in this case a selective field threshold adjust implanted diode) with a view to immediate implementation on first silicon.

With shrinking dimension of the transistor gate, the gate profile and line dimension control requirement becomes more stringent. LPCVD (Low Pressure Chemical Vapor Deposition) polysilicon is used as the gate material with thermally grown thin nitrided gate oxide. Bottom Anti-Reflective Coating is used together with Deep UV resist for patterning. After etch, footing at the gate bottom is observed and the resulting in-line line width has a large degree of non- uniformity. These phenomena are found on both 0.25 micrometers and 0.18 micrometers structure. In this paper, we present the application of Design of Experiment principle in solving footing problem at the bottom of the gate polysilicon and obtaining better in-line control.

Technology CAD (TCAD) is a commonly used tool in process development and analysis. The task of creating the process in the required format for the TCAD deck is non-trivial and often prone to error due to the detailed nature of the furnace processing. Ensuring that the simulation deck is matched to the actual furnace process is also a key area. There is a difference between what is programmed into the furnace and what the wafers actually see. This work presents a method of automatic download of the actual furnace parameters to a format directly readable by the process simulator SUPREM, and examines the consequences of the furnace variability inherent in batch processing. The three furnace zones can be seen to interact and product best-worst case simulations to aid in the prediction of manufacturability.

This paper describes how costings analysis can be incorporated into a framework for process development. It describes how Cost of Ownership can be calculated from the information stored within existing process development tools through the use of CASTT (Cost Analysis in Total TCAD). It provides a method by which manufacturing costs can be forecast and alternative processing options can be compared. The existing elements of Total TCAD framework are described, an outline of the CASTT software is then given and examples are used to illustrate its potential.

This paper investigates the use of plasma diagnostic monitoring to implement the right methodology to improve MTBC (Mean Time Between Clean) and decrease the defectivity on the LAM TCP9600. A global approach was used to reach our MTBC and defectivity goals by working on the main chamber wet clean procedures, on the conditioning procedures, on the pumping conditions and on the gas lines. The different partners involved were ST Microelectronics, LAM RESEARCH, ALCALEL, MILLIPORE and ASI.

In this article, we report the use of ultraviolet absorption spectroscopy for CF₂ detection in a large area parallel plate capacitively coupled reactive ion etching system and correlation of data from this and other plasma sensors to the etch rate of SiO₂ and a-Si in CF₄/CHF₃ plasmas. We present statistical models for estimation of a- Si etch rate in the operational regime in which the CF₂ concentration is in the range of 0.4 approximately 1.6 volume % of total gas in the etch chamber. A small change in CF₂ concentration translates into quite a large variation in terms of SiO₂/a-Si etch selectivity, and this makes CF₂ concentration a useful variable in process control. We will show statistically that silicon etch rates can be very well estimated by using sensors for CF₂ and fluorine.

The Self Exited Electron Resonance Spectroscopy is a new method of plasma characterization that gives access to collision rate, electron density, sheath width and bulk power. We used that method on a TCP9400SE for Poly/Polycide etching in order to optimize the CD control. To do that, we first checked all possible correlation's between the plasma parameters and the resulting effects on the wafers like side wall polymerization, CD gain, etchrate, oxide loss and oxide damage. Those results were first obtained on test wafers and were then rechecked on product wafers. Both series of experiments were consistent and allowed us to find the mechanism for the side wall polymers growth. Then we could identify the electron density value that gave the best CD control.

Vision systems in quality control are increasingly widespread but are currently suffering from limitations in certain applications which concern as well their processing capability and their miniaturization. Today modern optics and electronics make it possible to consider integration of the sensors for acquisition and the processors for the image processing on a same circuit. The goal of this article is to present the broad outline of our sensor architecture and to formalize a motion detection method set up in a processor network optimized for a given algorithm.

A uniform TEGAL 903E plasma oxide etch process, has been developed using a novel analytical technique. The process has been implemented successfully in the manufacturing arena. The novel analytical technique involves executing statistically designed experiments, then visually analyzing wafer uniformity topography maps. Modeling uniformity is usually done using a summary metric of standard deviation or normalized max-min values. This work demonstrates a weakness in this approach and presents a new strategy.

In this paper, four major defects for metal etch process will be introduced and discussed. The defect sources related to chamber condition are identified as well. These defects are classified into four types: (1) flake type metal residue, induced by chamber polymer, (2) ball type particle, resulted from the chamber wall arcing during process, (3) on film particle, found during post-etch and photo resist strip processes, (4) metal broken, came from local arcing on wafer. All of these defects would result in metal line bridge and yield loss. In order to reduce the particle contamination, the paper proposes a protection method for chamber parts by using so called `linear' to cover most of chamber parts. The liner could adapt to chamber shape and clean easily. Experimental data shows that it can successfully reduce flake type metal residue, ball type particle. For the on film particle and metal broken, a new routine monitor method is also created.

Silk-like polymers (SLP) are inspected after photoresist stripping at the post-passivation-etch stage. They mainly distribute on the scribe lines between the die chips, but partially generate from the bonding pads and stay on the passivation films. Their width is around 100 - 200 nm, but the length could be extended to several hundred micrometers. The SLP will act as a mask with respect to the following low-power CF₄ plasma treatment and leave the SLP-shaped replicas on the passivation films. They even remain on the bonding pads to affect the bonding performance. An O₂ plasma cleaning chemicals was found with the ability to successfully remove the SLP. The formation mechanism of the SLP will be investigated and the prevention methods also discussed in the study.

This paper describes the integration of TCAD and factory simulation software tools to help facilitate their adoption as an integral part of a DFM (Design for Manufacturability) strategy. Automated exchange of data enables the impact on manufacturing operations to be more readily considered at an earlier stage during the process design procedure. The paper describes the design and operation of the FASTT (Factory Simulation in Total TCAD) software which integrates two commercially available simulation tools--TWB and ManSim/X. Two examples are used to illustrate its application within a DFM strategy.

In today's high volume manufacturing of semiconductor devices large amounts of capital are required to establish and operate production facilities. Therefore, IC manufacturers are now `cloning' processes to enable products and technologies to be transferred to other sites to provide optimum production flexibility. Unfortunately, these processes cannot always simply be lifted and `dropped' into a new facility, even if identical tools are used. During a process and product transfer from one Motorola fab to another the metal etch process exhibited some unexpected complications as severely undercut metal profiles were seen on certain products. Although initially not very well understood the reason for this defect turned out to be ion deflection due to electron shading. This paper will show that by applying the relevant statistical tools this mechanism can be controlled or even completely eliminated. Adjustment of plasma parameters will result in a process which yields excellent profile control.

Two sensor techniques and a data analysis algorithm have been investigated, to assess their suitability for in-situ process monitoring and integrated metrology in semiconductor manufacture. The first sensor is a prototype system which uses two laser beams of different wavelength to module the surface temperature of a wafer. The ratio of detected thermal radiances at the two wavelengths is ideally independent of wafer emissivity. Initial measurements on differently-processed silicon wafers in the temperature range 620 - 1000 degree(s)C show systematic errors of the order 10 degree(s)C. The second sensor is a spectroscopic ellipsometry system fully integrated onto a low pressure chemical vapor deposition reactor for monitoring and controlling growth of silicon-germanium (SiGe) alloys. Algorithms for determining alloy composition and film thicknesses during growth are discussed. The use of a sample-based particle filter based on Bayesian statistics for tracking a semiconductor process is described for the first time.