19 August 1999 Integratible process for fabrication of fluidic microduct networks on a single wafer
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Proceedings Volume 3877, Microfluidic Devices and Systems II; (1999) https://doi.org/10.1117/12.359328
Event: Symposium on Micromachining and Microfabrication, 1999, Santa Clara, CA, United States
Abstract
We present a microelectronics fabrication compatible process that comprises photolithography and a key room temperature SiON thin film plasma deposition to define and seal a fluidic microduct network. Our single wafer process is independent of thermo-mechanical material properties, particulate cleaning, global flatness, assembly alignment, and glue medium application, which are crucial for wafer fusion bonding or sealing techniques using a glue medium. From our preliminary experiments, we have identified a processing window to fabricate channels on silicon, glass and quartz substrates. Channels with a radius of curvature between 8 and 50 mm, are uniform along channel lengths of several inches and repeatable across the wafer surfaces. To further develop this technology, we have begun characterizing the SiON film properties such as elastic modulus using nanoindentation, and chemical bonding compatibility with other microelectric materials.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Carolyn M. Matzke, Carolyn M. Matzke, Carol I. H. Ashby, Carol I. H. Ashby, Monica M. Bridges, Monica M. Bridges, Leonardo Griego, Leonardo Griego, C. Channy Wong, C. Channy Wong, } "Integratible process for fabrication of fluidic microduct networks on a single wafer", Proc. SPIE 3877, Microfluidic Devices and Systems II, (19 August 1999); doi: 10.1117/12.359328; https://doi.org/10.1117/12.359328
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